driver/intel/fsp2_0: Update soc_binding.h for coreboot compatibility
Included <efi/efi_datatype.h> to address coreboot style header
definitions rather using EDK2 header <Base.h>.
TEST=Able to build google/rex0.
Change-Id: I66559872c8d137d1baef5860fb98cad2a5214368
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82265
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
index ba3e289..2adfaf3 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
@@ -7,6 +7,8 @@
#pragma pack(push)
+#include <efi/efi_datatype.h>
+
/**
* These includes are required to include headers that are missing in
* the FSP headers. Import order matter for the correct PiHob definition
@@ -24,7 +26,6 @@
* This file is a implementation specific header. i.e. different
* FSP implementations for different chipsets.
*/
-#include <Base.h>
#include <FspmUpd.h>
#include <FspsUpd.h>
#if CONFIG(MRC_CACHE_USING_MRC_VERSION)