soc/intel: Drop unused `GPIO_NUM_GROUPS` macro

This macro is unused and its value is often wrong. Drop it.

Change-Id: Id3cfaa4d2eef49eddc02833efbe14e0c5c816263
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51662
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
index 48cbacb..de1452e 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs.h
@@ -25,7 +25,6 @@
 #define GROUP_JTAG		0xE
 #define GROUP_HVMOS		0xF
 
-#define GPIO_NUM_GROUPS		15
 #define GPIO_MAX_NUM_PER_GROUP	24
 
 /*
diff --git a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
index 9396c0b..02ff527 100644
--- a/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
+++ b/src/soc/intel/cannonlake/include/soc/gpio_soc_defs_cnp_h.h
@@ -21,7 +21,6 @@
 #define GPP_K			0x9
 #define GPP_I			0xA
 #define GPP_J			0xB
-#define GPIO_NUM_GROUPS		12
 #define GPIO_MAX_NUM_PER_GROUP	24
 
 /*
diff --git a/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h b/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h
index 278c2c6..38e8a7e 100644
--- a/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/elkhartlake/include/soc/gpio_soc_defs.h
@@ -22,7 +22,6 @@
 #define GPP_GPD			0xA
 #define GPP_E			0xD
 
-#define GPIO_NUM_GROUPS		12
 #define GPIO_MAX_NUM_PER_GROUP	24
 #define SD_PWR_EN_PIN		GPP_H1
 
diff --git a/src/soc/intel/icelake/include/soc/gpio_soc_defs.h b/src/soc/intel/icelake/include/soc/gpio_soc_defs.h
index 62407df..2a7d424 100644
--- a/src/soc/intel/icelake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/icelake/include/soc/gpio_soc_defs.h
@@ -21,7 +21,6 @@
 #define GPP_C			0xA
 #define GPP_E			0xB
 
-#define GPIO_NUM_GROUPS		11
 #define GPIO_MAX_NUM_PER_GROUP	24
 
 /*
diff --git a/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h b/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h
index 25a0625..6b11ac7 100644
--- a/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/jasperlake/include/soc/gpio_soc_defs.h
@@ -22,7 +22,6 @@
 #define GPP_GPD			0xA
 #define GPP_E			0xD
 
-#define GPIO_NUM_GROUPS		12
 #define GPIO_MAX_NUM_PER_GROUP	24
 #define SD_PWR_EN_PIN		GPP_H1
 
diff --git a/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h b/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h
index 727bc20..6edb477 100644
--- a/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h
+++ b/src/soc/intel/skylake/include/soc/gpio_pch_h_defs.h
@@ -19,7 +19,6 @@
 #define GPP_H			7
 #define GPP_I			8
 #define GPD			9
-#define GPIO_NUM_GROUPS		10
 #define GPIO_MAX_NUM_PER_GROUP	24
 
 #define GPIO_DWx_COUNT		2 /* DW0 and DW1 */
diff --git a/src/soc/intel/skylake/include/soc/gpio_soc_defs.h b/src/soc/intel/skylake/include/soc/gpio_soc_defs.h
index af09205..47ddd17 100644
--- a/src/soc/intel/skylake/include/soc/gpio_soc_defs.h
+++ b/src/soc/intel/skylake/include/soc/gpio_soc_defs.h
@@ -17,7 +17,6 @@
 #define GPP_F			5
 #define GPP_G			6
 #define GPD			7
-#define GPIO_NUM_GROUPS		8
 #define GPIO_MAX_NUM_PER_GROUP	24
 
 #define GPIO_DWx_COUNT		2 /* DW0 and DW1 */
diff --git a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
index 93dcf20..8c37a84 100644
--- a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
+++ b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
@@ -33,7 +33,6 @@
 #define COMM_2			5
 #define  GPD			0xC
 
-#define GPIO_NUM_GROUPS			13
 #define GPIO_MAX_NUM_PER_GROUP		24
 
 /* Group A */