diff --git a/src/acpi/acpi_dmar.c b/src/acpi/acpi_dmar.c
index 3853142..20a100d 100644
--- a/src/acpi/acpi_dmar.c
+++ b/src/acpi/acpi_dmar.c
@@ -36,7 +36,7 @@
 	header->checksum = acpi_checksum((void *)dmar, header->length);
 }
 
-unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
+unsigned long acpi_create_dmar_drhd_4k(unsigned long current, u8 flags,
 	u16 segment, u64 bar)
 {
 	dmar_entry_t *drhd = (dmar_entry_t *)current;
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index 4a71aef..469d672 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -1849,7 +1849,7 @@
 
 void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
 		      unsigned long (*acpi_fill_dmar)(unsigned long));
-unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
+unsigned long acpi_create_dmar_drhd_4k(unsigned long current, u8 flags,
 				    u16 segment, u64 bar);
 unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
 				    u64 bar, u64 limit);
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 246fe9a..70f0736 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -25,13 +25,13 @@
 							   PCI_CLASS_REVISION);
 
 	unsigned long tmp = current;
-	current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
+	current += acpi_create_dmar_drhd_4k(current, 0, 0, IOMMU_BASE1);
 	current += acpi_create_dmar_ds_pci(current, 0, 0x1b, 0);
 	acpi_dmar_drhd_fixup(tmp, current);
 
 	if (stepping != STEPPING_B2 && igd_active) {
 		tmp = current;
-		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE2);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, IOMMU_BASE2);
 		current += acpi_create_dmar_ds_pci(current, 0, 0x2, 0);
 		current += acpi_create_dmar_ds_pci(current, 0, 0x2, 1);
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -39,7 +39,7 @@
 
 	if (me_active) {
 		tmp = current;
-		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE3);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, IOMMU_BASE3);
 		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 0);
 		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 1);
 		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 2);
@@ -47,7 +47,7 @@
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
 
-	current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE4);
+	current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE4);
 
 	/* TODO: reserve GTT for 0.2.0 and 0.2.1? */
 	return current;
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index f3c107b..bd2f719 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -28,7 +28,7 @@
 	if (emit_igd) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -37,7 +37,7 @@
 	/* VTVC0BAR has to be set, enabled, and in 32-bit space */
 	if (vtvc0bar && vtvc0en && !mchbar_read32(VTVC0BAR + 4)) {
 		const unsigned long tmp = current;
-		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
+		current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR,
 							      PCH_IOAPIC_PCI_BUS,
 							      PCH_IOAPIC_PCI_SLOT, 0);
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 8be161e..3ffab4d 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -34,14 +34,14 @@
 	if (igfx && igfx->enabled) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, GFXVT_BASE);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, GFXVT_BASE);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
 
 	{
 		const unsigned long tmp = current;
-		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE);
+		current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE);
 
 		current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR,
 							      PCH_IOAPIC_PCI_BUS,
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c
index 7687f02..dcf8a7c 100644
--- a/src/soc/intel/alderlake/acpi.c
+++ b/src/soc/intel/alderlake/acpi.c
@@ -239,7 +239,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IGD) && gfxvtbar && gfxvten) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, SA_DEV_SLOT_IGD, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -251,7 +251,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IPU) && ipuvtbar && ipuvten) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, ipuvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, SA_DEV_SLOT_IPU, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -265,7 +265,7 @@
 			if (tbtbar && tbten) {
 				const unsigned long tmp = current;
 
-				current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
+				current += acpi_create_dmar_drhd_4k(current, 0, 0, tbtbar);
 				current += acpi_create_dmar_ds_pci_br(current, 0,
 								      SA_DEV_SLOT_TBT, i);
 
@@ -280,7 +280,7 @@
 	if (vtvc0bar && vtvc0en) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, V_P2SB_CFG_IBDF_BUS, V_P2SB_CFG_IBDF_DEV,
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index b84e454..c9f76eb 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -126,7 +126,7 @@
 	if (emit_igd) {
 		tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
@@ -138,7 +138,7 @@
 		union p2sb_bdf hbdf = p2sb_get_hpet_bdf();
 		p2sb_hide();
 
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, defvtbar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, ibdf.bus, ibdf.dev, ibdf.fn);
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 3fe574f..4c1cdf3 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -38,7 +38,7 @@
 	if (emit_igd) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -47,7 +47,7 @@
 	/* VTVC0BAR has to be set, enabled, and in 32-bit space */
 	if (vtvc0bar && vtvc0en && !mchbar_read32(VTVC0BAR + 4)) {
 		const unsigned long tmp = current;
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index a58c4f0..1fd16e9 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -261,7 +261,7 @@
 	if (emit_igd) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -273,7 +273,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IPU) && ipuvtbar && ipuvten) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, ipuvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 5, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -285,7 +285,7 @@
 	if (vtvc0bar && vtvc0en) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, V_P2SB_CFG_IBDF_BUS, V_P2SB_CFG_IBDF_DEV,
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index d0fde3e..afda045 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -173,7 +173,7 @@
 	if (!vtbar)
 		return current;
 
-	current += acpi_create_dmar_drhd(current,
+	current += acpi_create_dmar_drhd_4k(current,
 			DRHD_INCLUDE_PCI_ALL, 0, vtbar);
 
 	current += acpi_create_dmar_ds_ioapic_from_hw(current,
diff --git a/src/soc/intel/elkhartlake/acpi.c b/src/soc/intel/elkhartlake/acpi.c
index f566ce5..8e9c9be 100644
--- a/src/soc/intel/elkhartlake/acpi.c
+++ b/src/soc/intel/elkhartlake/acpi.c
@@ -175,7 +175,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IGD) && gfxvtbar && gfxvten) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -187,7 +187,7 @@
 	if (vtvc0bar && vtvc0en) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, V_P2SB_CFG_IBDF_BUS, V_P2SB_CFG_IBDF_DEV,
diff --git a/src/soc/intel/jasperlake/acpi.c b/src/soc/intel/jasperlake/acpi.c
index 6cf7ef5..5e432a9 100644
--- a/src/soc/intel/jasperlake/acpi.c
+++ b/src/soc/intel/jasperlake/acpi.c
@@ -173,7 +173,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IGD) && gfxvtbar && gfxvten) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -185,7 +185,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IPU) && ipuvtbar && ipuvten) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, ipuvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 5, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -197,7 +197,7 @@
 	if (vtvc0bar && vtvc0en) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, V_P2SB_CFG_IBDF_BUS, V_P2SB_CFG_IBDF_DEV,
diff --git a/src/soc/intel/meteorlake/acpi.c b/src/soc/intel/meteorlake/acpi.c
index c8d1978..a3ee198 100644
--- a/src/soc/intel/meteorlake/acpi.c
+++ b/src/soc/intel/meteorlake/acpi.c
@@ -235,14 +235,14 @@
 		__func__, gfxvtbar, MCHBAR32(GFXVTBAR));
 	if (is_devfn_enabled(PCI_DEVFN_IGD) && gfxvtbar && gfxvten) {
 		tmp = current;
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, PCI_DEV_SLOT_IGD, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
 	}
 
 	tmp = current;
-	current += acpi_create_dmar_drhd(current,
+	current += acpi_create_dmar_drhd_4k(current,
 			DRHD_INCLUDE_PCI_ALL, 0, VTVC0_BASE_ADDRESS);
 	current += acpi_create_dmar_ds_ioapic_from_hw(current,
 			IO_APIC_ADDR, V_P2SB_CFG_IBDF_BUS, V_P2SB_CFG_IBDF_DEV,
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 6a56071..e0381e8 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -193,7 +193,7 @@
 	if (emit_igd) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfx_vtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -206,7 +206,7 @@
 	if (vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
+		current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 
 		current += acpi_create_dmar_ds_ioapic_from_hw(current, IO_APIC_ADDR, V_P2SB_IBDF_BUS,
 						      V_P2SB_IBDF_DEV, V_P2SB_IBDF_FUN);
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c
index 5c4c838..c34b185 100644
--- a/src/soc/intel/tigerlake/acpi.c
+++ b/src/soc/intel/tigerlake/acpi.c
@@ -232,7 +232,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IGD) && gfxvtbar && gfxvten) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, gfxvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, SA_DEV_SLOT_IGD, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -244,7 +244,7 @@
 	if (is_devfn_enabled(SA_DEVFN_IPU) && ipuvtbar && ipuvten) {
 		unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar);
+		current += acpi_create_dmar_drhd_4k(current, 0, 0, ipuvtbar);
 		current += acpi_create_dmar_ds_pci(current, 0, SA_DEV_SLOT_IPU, 0);
 
 		acpi_dmar_drhd_fixup(tmp, current);
@@ -257,7 +257,7 @@
 		if (tbtbar && tbten) {
 			unsigned long tmp = current;
 
-			current += acpi_create_dmar_drhd(current, 0, 0, tbtbar);
+			current += acpi_create_dmar_drhd_4k(current, 0, 0, tbtbar);
 			current += acpi_create_dmar_ds_pci_br(current, 0,
 							      SA_DEV_SLOT_TBT, i);
 
@@ -271,7 +271,7 @@
 	if (vtvc0bar && vtvc0en) {
 		const unsigned long tmp = current;
 
-		current += acpi_create_dmar_drhd(current,
+		current += acpi_create_dmar_drhd_4k(current,
 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
 		current += acpi_create_dmar_ds_ioapic_from_hw(current,
 				IO_APIC_ADDR, V_P2SB_CFG_IBDF_BUS, V_P2SB_CFG_IBDF_DEV,
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c
index 6b6363d..a0bbbff 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi.c
@@ -272,12 +272,12 @@
 		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
 			"Register Base Address: 0x%x\n",
 			DRHD_INCLUDE_PCI_ALL, pcie_seg, reg_base);
-		current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL,
+		current += acpi_create_dmar_drhd_4k(current, DRHD_INCLUDE_PCI_ALL,
 			pcie_seg, reg_base);
 	} else {
 		printk(BIOS_DEBUG, "[Hardware Unit Definition] Flags: 0x%x, PCI Segment Number: 0x%x, "
 			"Register Base Address: 0x%x\n", 0, pcie_seg, reg_base);
-		current += acpi_create_dmar_drhd(current, 0, pcie_seg, reg_base);
+		current += acpi_create_dmar_drhd_4k(current, 0, pcie_seg, reg_base);
 	}
 
 	// Add PCH IOAPIC