commit f33e835a064d11179c37d2c306ba024aa3a636fd
author Elyes HAOUAS <ehaouas@noos.fr> Wed Oct 24 16:24:44 2018 +0200
committer Patrick Georgi <pgeorgi@google.com> Thu Nov 08 11:35:07 2018 +0000
tree 826b1eac0110370c45c75caeb80ff2007d3cc33d
parent 523d66915369404f94ad6a5ebc85dd272ae3b6fe

nb/intel/gm45: Use macro instead of magic number

Change-Id: I5caa6163e5471feda170600c21320821f4286c65
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/northbridge/intel/gm45/pm.c

diff --git a/src/northbridge/intel/gm45/pm.c b/src/northbridge/intel/gm45/pm.c
index 7a3b498..17a22dc 100644
--- a/src/northbridge/intel/gm45/pm.c
+++ b/src/northbridge/intel/gm45/pm.c
@@ -20,8 +20,8 @@
 #include <arch/io.h>
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
-#include <console/console.h>
 #include <cpu/x86/msr.h>
+#include <cpu/intel/speedstep.h>
 
 #include "gm45.h"
 
@@ -268,7 +268,8 @@
 		MCHBAR32(0x94) |= 3 << 22;
 	}
 
-	const int cpu_supports_super_lfm = rdmsr(0xee).lo & (1 << 27);
+	const int cpu_supports_super_lfm =
+				rdmsr(MSR_EXTENDED_CONFIG).lo & (1 << 27);
 	if ((stepping >= STEPPING_B0) && cpu_supports_super_lfm) {
 		MCHBAR16(CLKCFG_MCHBAR) &= ~(1 << 7);
 		MCHBAR16(CLKCFG_MCHBAR) |= 1 << 14;