nb/intel/e7505: Hook up PCI domain and CPU ops to devicetree
Change-Id: I70fb470b63ddd06f1d1e34deaea296d81e24f75f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70058
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/aopen/dxplplusu/devicetree.cb b/src/mainboard/aopen/dxplplusu/devicetree.cb
index 2dfa03d..df99751 100644
--- a/src/mainboard/aopen/dxplplusu/devicetree.cb
+++ b/src/mainboard/aopen/dxplplusu/devicetree.cb
@@ -3,9 +3,11 @@
chip northbridge/intel/e7505
device cpu_cluster 0 on
+ ops e7505_cpu_bus_ops
end
device domain 0 on
+ ops e7505_pci_domain_ops
device pci 0.0 on end # Chipset host controller
device pci 0.1 on end # Host RASUM controller
device pci 2.0 on # Hub interface B
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index cc7f85d..a353759 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -55,7 +55,7 @@
assign_resources(dev->link_list);
}
-static struct device_operations pci_domain_ops = {
+struct device_operations e7505_pci_domain_ops = {
.read_resources = mch_domain_read_resources,
.set_resources = mch_domain_set_resources,
.scan_bus = pci_domain_scan_bus,
@@ -63,23 +63,12 @@
};
-static struct device_operations cpu_bus_ops = {
+struct device_operations e7505_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
};
-static void enable_dev(struct device *dev)
-{
- /* Set the operations if it is a special bus type */
- if (dev->path.type == DEVICE_PATH_DOMAIN) {
- dev->ops = &pci_domain_ops;
- } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
- dev->ops = &cpu_bus_ops;
- }
-}
-
struct chip_operations northbridge_intel_e7505_ops = {
CHIP_NAME("Intel E7505 Northbridge")
- .enable_dev = enable_dev,
};