commit | f23cc1c0c1e1cb5a672804f7fca161b56cb88493 | [log] [tgz] |
---|---|---|
author | Elyes HAOUAS <ehaouas@noos.fr> | Fri Jan 07 18:26:24 2022 +0100 |
committer | Michał Żygowski <michal.zygowski@3mdeb.com> | Mon Jan 10 09:56:47 2022 +0000 |
tree | 15a6b35da3543539f9672d3fce8a51a2b53aa012 | |
parent | 44d103581daaf991d36dd1220425f56bdd3cedbe [diff] [blame] |
southbridge/amd/agesa/hudson/smi_util.c: Remove repeated "set" Change-Id: I6741084651a9472162cf549a4170e954e760f0f1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
diff --git a/src/southbridge/amd/agesa/hudson/smi_util.c b/src/southbridge/amd/agesa/hudson/smi_util.c index 6bb4338..3dc2d8a 100644 --- a/src/southbridge/amd/agesa/hudson/smi_util.c +++ b/src/southbridge/amd/agesa/hudson/smi_util.c
@@ -52,7 +52,7 @@ /* SMI0 source is GEVENT0 and so on */ configure_smi(gevent, mode); - /* And set set the trigger level */ + /* And set the trigger level */ reg32 = smi_read32(SMI_REG_SMITRIG0); reg32 &= ~(1 << gevent); reg32 |= (level & 0x1) << gevent;