commit f1b58b78351d7ed220673e688a2f7bc9e96da4e2
author Kyösti Mälkki <kyosti.malkki@gmail.com> Fri Mar 01 13:43:02 2019 +0200
committer Patrick Georgi <pgeorgi@google.com> Fri Mar 01 20:32:15 2019 +0000
tree d8aae223f0e426f189cb4750b972a31e09d46b88
parent 44e89af6e609874f2f18d30f1e66dce8b5a98eff

device/pci: Fix PCI accessor headers

PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.

Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/southbridge/intel/i82801dx/ac97.c

diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c
index f9a7904..cbbc370 100644
--- a/src/southbridge/intel/i82801dx/ac97.c
+++ b/src/southbridge/intel/i82801dx/ac97.c
@@ -19,6 +19,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <delay.h>
 #include "i82801dx.h"
 

src/southbridge/intel/i82801dx/bootblock.c

diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index a5e48e5..1601b55 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -13,6 +13,7 @@
 
 #include <cpu/intel/car/bootblock.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 
 void bootblock_early_southbridge_init(void)
 {

src/southbridge/intel/i82801dx/early_smbus.c

diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c
index fabb58b..83fd9a1 100644
--- a/src/southbridge/intel/i82801dx/early_smbus.c
+++ b/src/southbridge/intel/i82801dx/early_smbus.c
@@ -15,6 +15,7 @@
  */
 
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <console/console.h>
 #include <southbridge/intel/common/smbus.h>

src/southbridge/intel/i82801dx/i82801dx.c

diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c
index f233eed..765bcb2 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.c
+++ b/src/southbridge/intel/i82801dx/i82801dx.c
@@ -16,6 +16,7 @@
 
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ops.h>
 #include "i82801dx.h"
 
 void i82801dx_enable(struct device *dev)

src/southbridge/intel/i82801dx/smi.c

diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index bdea66f..b977e32 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
 #include <string.h>

src/southbridge/intel/i82801dx/smihandler.c

diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c
index e7a9589..17bedab 100644
--- a/src/southbridge/intel/i82801dx/smihandler.c
+++ b/src/southbridge/intel/i82801dx/smihandler.c
@@ -16,6 +16,7 @@
 
 #include <types.h>
 #include <arch/io.h>
+#include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>