This page describes how to run coreboot on Dell OptiPlex 9010 SFF.
+------------+---------------------------------------------------------------+ | CPU | Intel Core 2nd Gen (Sandybridge) or 3rd Gen (Ivybridge) | +------------+---------------------------------------------------------------+ | DRAM | Up to 4 DIMM slots, up to 32GB 1600MHz non-ECC DDR3 SDRAM | +------------+---------------------------------------------------------------+ | Chipset | Intel Q77 Express | +------------+---------------------------------------------------------------+ | Super I/O | SMSC SCH5545 (or SCH5544) with Environmental Controller | +------------+---------------------------------------------------------------+ | TPM | ST Microelectronics ST33ZP24 | +------------+---------------------------------------------------------------+ | Boot | From USB, SATA, NVMe (using PCIe x4 expansion card) | +------------+---------------------------------------------------------------+ | Power | 200W-275W PSU | +------------+---------------------------------------------------------------+
More specifications on Dell OptiPlex 9010 specifications.
+------------------+---------------------------------+---------------------+ | Binary file | Apply | Required / Optional | +==================+=================================+=====================+ | smsc_sch5545.bin | SMSC SCH5545 EC | Optional | +------------------+---------------------------------+---------------------+ | microcode | CPU microcode | Required | +------------------+---------------------------------+---------------------+
Microcode updates are automatically included into the coreboot image by build system from the 3rdparty/intel-microcode
submodule.
SMSC SC5545 EC firmware is optional, however lack of the binary will result in EC malfunction after power failure and fans running at full speed. The blob can be extracted from original firmware. It should be located under a file with GUID D386BEB8-4B54-4E69-94F5-06091F67E0D3, raw section. The file begins with a signature SMSCUBIM
. The easiest way to do this is to use UEFITool and Extract body
option on the raw section of the file.
+---------------------+--------------------------+ | Type | Value | +=====================+==========================+ | Socketed flash | no | +---------------------+--------------------------+ | Model | MX25L6406E/MX25L3206E | +---------------------+--------------------------+ | Size | 8 + 4 MiB | +---------------------+--------------------------+ | Package | SOIC-16 + SOIC-8 | +---------------------+--------------------------+ | Write protection | chipset PRR | +---------------------+--------------------------+ | Dual BIOS feature | no | +---------------------+--------------------------+ | Internal flashing | yes | +---------------------+--------------------------+
The SPI flash can be accessed using flashrom.
flashrom -p internal -w coreboot.rom --ifd -i bios
Internal programming will not work when migrating from original UEFI firmware. One will have to short the SERVICE_MODE jumper to enable HMRFPO and then boot the machine to flash it.
The external access to flash chip is available through standard SOP-8 clip and/or SOP-16 clip on the right side of the CPU fan (marked on the board image). The voltage of SPI flash is 3.3V.
There are no restrictions as to the programmer device. It is only recommended to flash firmware without supplying power. There are no diodes connected to the flash chips. External programming can be performed, for example using OrangePi and Armbian. You can use linux_spi driver which provides communication with SPI devices. Example command to program SPI flash with OrangePi using linux_spi:
flashrom -w coreboot.rom -p linux_spi:dev=/dev/spidev1.0,spispeed=16000
There are no schematics for SFF, but if one looks for MT/DT schematics, they can be found publicly. Most of the schematics should match the SFF (although MT/DT has additional PCIe and PCI slot).
Not all mainboard's peripherals and functions were tested because of lack of the cables or not being populated on the board case.