tree dff39e2cfd8e905f343d1d1f4e64e16c2526aac7
parent d83faceefa77e9a769a7e6de4ad5313d5afc422a
author Subrata Banik <subrata.banik@intel.com> 1519636740 +0530
committer Martin Roth <martinroth@google.com> 1520631632 +0000

soc/intel/skylake: Move PCR DMI programming into bootblock

As per PCH BWG 2.5.16, set up LPC IO Enables PCR[DMI] + 2774h bit
[15:0] to the same value program in LPC PCI offset 82h. Also this
cycle decoding is only allowed to set when SRLOCK is not set.

Hence move the required programming from lpc.c to pch.c.

Also only enable COM port ranges if CONFIG_DRIVERS_UART_8250IO
Kconfig is selected.

Change-Id: Ie706735492a450baa653d8a8bb74c6e42f5150b8
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/23866
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>