soc/amd: Clarify ACPI _PRT entry generation
The reference to a constant FCH IOAPIC interrupt count used
with GNB IOAPIC was a bit obscure.
Change-Id: I2d862e37424f9fea7f269cd09e9e90056531b643
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/arch/x86/include/arch/ioapic.h b/src/arch/x86/include/arch/ioapic.h
index a91ac14..6c5282b 100644
--- a/src/arch/x86/include/arch/ioapic.h
+++ b/src/arch/x86/include/arch/ioapic.h
@@ -5,7 +5,6 @@
#define IO_APIC_ADDR 0xfec00000
#define VIO_APIC_VADDR ((u8 *)IO_APIC_ADDR)
-#define IO_APIC_INTERRUPTS 24
#ifndef __ACPI__
diff --git a/src/soc/amd/common/block/pci/acpi_prt.c b/src/soc/amd/common/block/pci/acpi_prt.c
index c142f57..f748024 100644
--- a/src/soc/amd/common/block/pci/acpi_prt.c
+++ b/src/soc/amd/common/block/pci/acpi_prt.c
@@ -7,20 +7,22 @@
#include <arch/ioapic.h>
#include <device/device.h>
+/* GNB IO-APIC is located after the FCH IO-APIC */
+#define FCH_IOAPIC_INTERRUPTS 24
+#define GNB_GSI_BASE FCH_IOAPIC_INTERRUPTS
+
static void acpigen_write_PRT_GSI(const struct pci_routing_info *routing_info)
{
unsigned int irq;
acpigen_write_package(4); /* Package - APIC Routing */
for (unsigned int i = 0; i < 4; ++i) {
- /* GNB IO-APIC is located after the FCH IO-APIC */
- irq = IO_APIC_INTERRUPTS;
- irq += pci_calculate_irq(routing_info, i);
+ irq = pci_calculate_irq(routing_info, i);
acpigen_write_PRT_GSI_entry(
0, /* There is only one device attached to the bridge */
i, /* pin */
- irq);
+ GNB_GSI_BASE + irq);
}
acpigen_pop_len(); /* Package - APIC Routing */
}