src/*/intel/: clarify Kconfig options regarding IFD
HAVE_INTEL_FIRMWARE is used to enable certain options that rely on a valid
Inter Flash Descriptor to exist. It does *not* identify platforms or boards
that are capable of running in descriptor mode if it's valid.
Refine the help text to make this clear.
Introduce a new option INTEL_DESCRIPTOR_MODE_CAPABLE that does simply
declare that IFD is supported by the platform. Select this value everywhere
instead of the HAVE_INTEL_FIRMWARE and default HAVE_INTEL_FIRMWARE to
y if INTEL_DESCRIPTOR_MODE_CAPABLE is selected.
Move the QEMU Q35 special case (deselection of HAVE_INTEL_FIRMWARE) to
the mainboard directory.
Change-Id: I4791fce03982bf0443bf0b8e26d9f4f06c6f2060
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/28371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig
index 6e3dc04..10b5a93 100644
--- a/src/mainboard/emulation/qemu-q35/Kconfig
+++ b/src/mainboard/emulation/qemu-q35/Kconfig
@@ -36,4 +36,9 @@
hex
default 0x10000
+# Do not show IFD/blob options since QEMU doesn't care
+config HAVE_INTEL_FIRMWARE
+ bool
+ default n
+
endif # BOARD_EMULATION_QEMU_X86_Q35
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 3e84a50..4dcecf5 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -45,7 +45,7 @@
select COMMON_FADT
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
select GENERIC_GPIO_LIB
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select MRC_SETTINGS_PROTECT
select MRC_SETTINGS_VARIABLE_DATA
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index b4dc823..7b87766 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -34,7 +34,7 @@
select TSC_SYNC_MFENCE
select UDELAY_TSC
select SOC_INTEL_COMMON
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SPI_CONSOLE_SUPPORT
select INTEL_GMA_ACPI
select INTEL_GMA_SWSMISCI
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 607d78c..2799e5b 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -42,7 +42,7 @@
select TSC_SYNC_MFENCE
select UDELAY_TSC
select USE_GENERIC_FSP_CAR_INC
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SPI_CONSOLE_SUPPORT
select HAVE_FSP_GOP
select GENERIC_GPIO_LIB
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 32148c4..ffd7c73 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -35,7 +35,7 @@
select TSC_SYNC_MFENCE
select UDELAY_TSC
select SOC_INTEL_COMMON
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select HAVE_SPI_CONSOLE_SUPPORT
select CPU_INTEL_COMMON
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 310ed24..3392728 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -36,7 +36,7 @@
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_HARD_RESET
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 6c366f1..4517065 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -43,6 +43,7 @@
select PARALLEL_MP
select PCR_COMMON_IOSF_1_0
select SMP
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CPU
# select SOC_INTEL_COMMON_BLOCK_SA
diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig
index 68084bc..2019b6d 100644
--- a/src/soc/intel/fsp_baytrail/Kconfig
+++ b/src/soc/intel/fsp_baytrail/Kconfig
@@ -41,7 +41,7 @@
select TSC_SYNC_MFENCE
select UDELAY_TSC
select SUPPORT_CPU_UCODE_IN_CBFS
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SPI_CONSOLE_SUPPORT
# Microcode header files are delivered in FSP package
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig
index 37876b5..5f09bdd 100644
--- a/src/soc/intel/fsp_broadwell_de/Kconfig
+++ b/src/soc/intel/fsp_broadwell_de/Kconfig
@@ -22,7 +22,7 @@
select SUPPORT_CPU_UCODE_IN_CBFS
# Microcode header files are delivered in FSP package
select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SMM_TSEG
select HAVE_SMI_HANDLER
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 9412b03..9a5aae4 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -32,7 +32,7 @@
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
select HAVE_HARD_RESET
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
select INTEL_GMA_ACPI
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index c028595..16602cf 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -37,7 +37,7 @@
select PCIEXP_COMMON_CLOCK
select COMMON_FADT
select ACPI_SATA_GENERATOR
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOUTHBRIDGE_INTEL_COMMON_GPIO
select RTC
select HAVE_INTEL_CHIPSET_LOCKDOWN
diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig
index 4f8a407..73e01cd 100644
--- a/src/southbridge/intel/common/Kconfig
+++ b/src/southbridge/intel/common/Kconfig
@@ -25,6 +25,12 @@
config SOUTHBRIDGE_INTEL_COMMON_SMM
def_bool n
+config INTEL_DESCRIPTOR_MODE_CAPABLE
+ def_bool n
+ help
+ This config simply states that the platform is *capable* of running in
+ descriptor mode (when the descriptor in flash is valid).
+
config INTEL_CHIPSET_LOCKDOWN
depends on HAVE_INTEL_CHIPSET_LOCKDOWN && HAVE_SMI_HANDLER && !CHROMEOS
#ChromeOS's payload seems to handle finalization on its on.
diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig
index 590d1203..97fb993 100644
--- a/src/southbridge/intel/common/firmware/Kconfig
+++ b/src/southbridge/intel/common/firmware/Kconfig
@@ -16,9 +16,12 @@
config HAVE_INTEL_FIRMWARE
bool
+ default y if INTEL_DESCRIPTOR_MODE_CAPABLE
help
- Chipset uses the Intel Firmware Descriptor to describe the
- layout of the SPI ROM chip.
+ Platform uses the Intel Firmware Descriptor to describe the
+ layout of the SPI ROM chip. Enabling this option will allow you to
+ select further features that rely on this like providing individual
+ firmware blobs.
if HAVE_INTEL_FIRMWARE
diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig
index 877a335..cf693f6 100644
--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig
+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig
@@ -29,7 +29,7 @@
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select COMMON_FADT
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI
diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig
index d0cb45c..9dd62ed 100644
--- a/src/southbridge/intel/fsp_i89xx/Kconfig
+++ b/src/southbridge/intel/fsp_i89xx/Kconfig
@@ -29,7 +29,7 @@
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select COMMON_FADT
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select NO_EARLY_BOOTBLOCK_POSTCODES
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig
index ab85ec4..3cd5861 100644
--- a/src/southbridge/intel/fsp_rangeley/Kconfig
+++ b/src/southbridge/intel/fsp_rangeley/Kconfig
@@ -29,7 +29,7 @@
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select SPI_FLASH
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig
index 236b43a..9e88a28 100644
--- a/src/southbridge/intel/i82801ix/Kconfig
+++ b/src/southbridge/intel/i82801ix/Kconfig
@@ -27,7 +27,7 @@
select HAVE_USBDEBUG_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON_GPIO
select SOUTHBRIDGE_INTEL_COMMON_SMM
- select HAVE_INTEL_FIRMWARE if !BOARD_EMULATION_QEMU_X86_Q35
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
if SOUTHBRIDGE_INTEL_I82801IX
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index 2c98f72..bf2d01f 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -27,7 +27,7 @@
select HAVE_SMI_HANDLER
select HAVE_USBDEBUG_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON_GPIO
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select COMMON_FADT
if SOUTHBRIDGE_INTEL_I82801JX
diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig
index d377950..5b085b7 100644
--- a/src/southbridge/intel/ibexpeak/Kconfig
+++ b/src/southbridge/intel/ibexpeak/Kconfig
@@ -35,7 +35,7 @@
select HAVE_USBDEBUG_OPTIONS
select COMMON_FADT
select ACPI_SATA_GENERATOR
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select SOUTHBRIDGE_INTEL_COMMON_GPIO
select HAVE_INTEL_CHIPSET_LOCKDOWN
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index ee870fc..dc25b85 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -30,7 +30,7 @@
select USE_WATCHDOG_ON_BOOT
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
- select HAVE_INTEL_FIRMWARE
+ select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SPI_CONSOLE_SUPPORT
select RTC
select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP