| commit | ef079c86ea3c24dd30d1bbad2e446632ec1c0104 | [log] [tgz] |
|---|---|---|
| author | Jamie Ryu <jamie.m.ryu@intel.com> | Wed Jun 24 15:55:10 2020 -0700 |
| committer | Patrick Georgi <pgeorgi@google.com> | Sun Jul 12 19:30:55 2020 +0000 |
| tree | 115c2e656b523d194162f7bc07eb334a5e8fccbc | |
| parent | 6aedba2f134b8154a342248deae49bc37fc234ce [diff] [blame] |
mb/intel/tglrvp: Enable CpuReplacementCheck Enable CpuReplacementCheck for TGLRVP with a CPU socket. Test=build and verified with tglrvp Change-Id: I75b4a4609c172c341087077228e23c6d31a9e7e1 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42789 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index 1396d3a..612a97d 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -32,6 +32,9 @@ register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Not used register "usb3_ports[3]" = "USB3_PORT_EMPTY" # USB3/USB2 Flex Connector + # CPU replacement check + register "CpuReplacementCheck" = "1" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201"