diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index 7acc5af..e3525135 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -23,14 +23,14 @@
 	mchbar_write32(VTVC0BAR + 0, VTVC0_BASE | 1);
 
 	/* Lock policies */
-	write32((void *)(GFXVT_BASE + 0xff0), 0x80000000);
+	write32p(GFXVT_BASE + 0xff0, 0x80000000);
 
 	const struct device *const azalia = pcidev_on_root(0x1b, 0);
 	if (azalia && azalia->enabled) {
-		write32((void *)(VTVC0_BASE + 0xff0), 0x20000000);
-		write32((void *)(VTVC0_BASE + 0xff0), 0xa0000000);
+		write32p(VTVC0_BASE + 0xff0, 0x20000000);
+		write32p(VTVC0_BASE + 0xff0, 0xa0000000);
 	} else {
-		write32((void *)(VTVC0_BASE + 0xff0), 0x80000000);
+		write32p(VTVC0_BASE + 0xff0, 0x80000000);
 	}
 }
 
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 4e95815..b3f913ef 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1513,7 +1513,7 @@
 
 	for (j = 0; j < 16; j++) {
 		addr = 0x04000000 + channel_offset + 4 * j;
-		write32((void *)addr, j & 2 ? b : a);
+		write32p(addr, j & 2 ? b : a);
 	}
 
 	sfence();
@@ -1538,11 +1538,11 @@
 
 	for (j = 0; j < 16; j++) {
 		addr = 0x04000000 + channel_offset + j * 4;
-		write32((void *)addr, 0xffffffff);
+		write32p(addr, 0xffffffff);
 	}
 	for (j = 0; j < 16; j++) {
 		addr = 0x04000000 + channel_offset + channel_step + j * 4;
-		write32((void *)addr, 0);
+		write32p(addr, 0);
 	}
 	sfence();
 
@@ -1948,7 +1948,7 @@
 					val = ~val;
 
 				addr = (1 << 26) + offset + i * step + j * 4;
-				write32((void *)addr, val);
+				write32p(addr, val);
 			}
 		}
 	} else {
@@ -1956,7 +1956,7 @@
 			for (j = 0; j < 16; j++) {
 				const u32 val = pattern[i][j];
 				addr = (1 << 26) + offset + i * step + j * 4;
-				write32((void *)addr, val);
+				write32p(addr, val);
 			}
 		}
 		sfence();