tree 40ac04eebe1001500296c1b7dd323bdeaf00dd34
parent 0aa069fb10d179a31159d323800eb363e7769661
author Keith Hui <buurin@gmail.com> 1707176986 -0500
committer Martin L Roth <gaumless@gmail.com> 1717805496 +0000

nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree

Transfer all USB responsibilities to southbridge/intel/bd82x6x,
using one set of USB port configuration supplied by mainboards
in the southbridge section of their devicetree.

For MRC raminit, export southbridge_fill_pei_data() as a hook for
southbridge code to implement. With new code via this hook, bd82x6x
fills pei_data based on this one set of USB port config.

For native raminit, early_usb_init() now goes directly to the devicetree
and no longer get passed an address to it.

TEST=abuild passes for all affected boards. All USB ports still work
on asus/p8x7x-series/v/p8z77-m.

Change-Id: I38378c7ee0701abc434b030dd97873f2af63e6b0
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81881
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>