diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 8155479..8face06 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -64,10 +64,6 @@
 
 void early_usb_init(const struct southbridge_usb_port *portmap);
 
-/* PM I/O Space */
-#define UPRWC			0x3c
-#define  UPRWC_WR_EN		(1 << 1) /* USB Per-Port Registers Write Enable */
-
 /* PCI Configuration Space (D30:F0): PCI2PCI */
 #define PSTS	0x06
 #define SMLT	0x1b
@@ -459,6 +455,11 @@
 #define SMI_STS		0x34
 #define ALT_GP_SMI_EN	0x38
 #define ALT_GP_SMI_STS	0x3a
+
+/* PM I/O Space */
+#define UPRWC			0x3c
+#define  UPRWC_WR_EN		(1 << 1) /* USB Per-Port Registers Write Enable */
+
 #define GPE_CNTL	0x42
 #define DEVACT_STS	0x44
 #define PM2_CNT		0x50 // mobile only