commit eca0d70c98b546455371f2103cfc78fc5028fd47
author Angel Pons <th3fanbus@gmail.com> Wed May 26 15:05:12 2021 +0200
committer Felix Held <felix-coreboot@felixheld.de> Thu May 27 15:40:12 2021 +0000
tree 8db78ec88b8c958d51d1f5ee4e4a93e4f6c846be
parent 54fc8b35d1026c26c1bf3cbbe829b8952a49582f

drivers/intel/fsp1_1: Drop unused weak definitions

The only FSP 1.1 platform is Braswell. Drop unused weak definitions for
functions where a non-weak definition always exists.

Tested with BUILD_TIMELESS=1, Facebook fbg1701 remains identical.

Change-Id: Ifaf40a1cd661b123911fbeaafeb2b7002559a435
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/drivers/intel/fsp1_1/raminit.c

diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c
index 44e7693..c74955e 100644
--- a/src/drivers/intel/fsp1_1/raminit.c
+++ b/src/drivers/intel/fsp1_1/raminit.c
@@ -249,30 +249,6 @@
 	}
 }
 
-/* Initialize the UPD parameters for MemoryInit */
-__weak void mainboard_memory_init_params(
-	struct romstage_params *params,
-	MEMORY_INIT_UPD *upd_ptr)
-{
-	printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
-/* Display the UPD parameters for MemoryInit */
-__weak void soc_display_memory_init_params(
-	const MEMORY_INIT_UPD *old, MEMORY_INIT_UPD *new)
-{
-	printk(BIOS_SPEW, "UPD values for MemoryInit:\n");
-	hexdump32(BIOS_SPEW, new, sizeof(*new));
-}
-
-/* Initialize the UPD parameters for MemoryInit */
-__weak void soc_memory_init_params(
-	struct romstage_params *params,
-	MEMORY_INIT_UPD *upd)
-{
-	printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
-}
-
 /* Initialize the SoC after MemoryInit */
 __weak void mainboard_after_memory_init(void)
 {

src/drivers/intel/fsp1_1/ramstage.c

diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index b10fccd..597e886 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -171,14 +171,6 @@
 __weak void mainboard_silicon_init_params(
 	SILICON_INIT_UPD *params)
 {
-};
-
-/* Display the UPD parameters for SiliconInit */
-__weak void soc_display_silicon_init_params(
-	const SILICON_INIT_UPD *old, SILICON_INIT_UPD *new)
-{
-	printk(BIOS_SPEW, "UPD values for SiliconInit:\n");
-	hexdump32(BIOS_SPEW, new, sizeof(*new));
 }
 
 /* Initialize the UPD parameters for SiliconInit */

src/drivers/intel/fsp1_1/romstage.c

diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 1befc47..01d186f 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -136,12 +136,6 @@
 	post_code(0x38);
 }
 
-/* Initialize the power state */
-__weak struct chipset_power_state *fill_power_state(void)
-{
-	return NULL;
-}
-
 /* Board initialization before and after RAM is enabled */
 __weak void mainboard_pre_raminit(struct romstage_params *params)
 {
@@ -284,18 +278,6 @@
 {
 }
 
-/* Save the memory configuration data */
-__weak int mrc_cache_stash_data(int type, uint32_t version,
-					const void *data, size_t size)
-{
-	return -1;
-}
-
-/* SOC initialization after RAM is enabled */
-__weak void soc_after_ram_init(struct romstage_params *params)
-{
-}
-
 /* SOC initialization before RAM is enabled */
 __weak void soc_pre_ram_init(struct romstage_params *params)
 {