soc/intel/common/block/smbus: Drop reg-script usage
Using reg-script just to read-modify-write some registers makes no
sense. Replace reg-script usage with regular register operations.
Change-Id: I87d1278360a231cbe5b5f825ad9a448e59e63ea2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58006
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/intel/common/block/smbus/smbus_early.c b/src/soc/intel/common/block/smbus/smbus_early.c
index cc59c28..a3173f3 100644
--- a/src/soc/intel/common/block/smbus/smbus_early.c
+++ b/src/soc/intel/common/block/smbus/smbus_early.c
@@ -1,30 +1,27 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/io.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <device/smbus_host.h>
#include <intelblocks/smbus.h>
-#include <reg_script.h>
#include <soc/pci_devs.h>
#include "smbuslib.h"
-static const struct reg_script smbus_init_script[] = {
- /* Set SMBus I/O base address */
- REG_PCI_WRITE32(PCI_BASE_ADDRESS_4, SMBUS_IO_BASE),
- /* Set SMBus enable */
- REG_PCI_WRITE8(HOSTC, HST_EN),
- /* Enable I/O access */
- REG_PCI_WRITE16(PCI_COMMAND, PCI_COMMAND_IO),
- /* Disable interrupts */
- REG_IO_WRITE8(SMBUS_IO_BASE + SMBHSTCTL, 0),
- /* Clear errors */
- REG_IO_WRITE8(SMBUS_IO_BASE + SMBHSTSTAT, 0xff),
- /* Indicate the end of this array by REG_SCRIPT_END */
- REG_SCRIPT_END,
-};
-
void smbus_common_init(void)
{
- reg_script_run_on_dev(PCH_DEV_SMBUS, smbus_init_script);
+ const pci_devfn_t dev = PCH_DEV_SMBUS;
+
+ /* Set SMBus I/O base address */
+ pci_write_config32(dev, PCI_BASE_ADDRESS_4, SMBUS_IO_BASE);
+ /* Set SMBus enable */
+ pci_write_config8(dev, HOSTC, HST_EN);
+ /* Enable I/O access */
+ pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
+ /* Disable interrupts */
+ outb(0, SMBUS_IO_BASE + SMBHSTCTL);
+ /* Clear errors */
+ outb(0xff, SMBUS_IO_BASE + SMBHSTSTAT);
}
uintptr_t smbus_base(void)