tigerlake mainboards: switch to devtree aliases for PMC MUX connectors
Now that soc_get_pmc_mux_device() is gone, the PMC MUX connector devices
can be hooked up together via devicetree aliases.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ib51764da5b3c029f9ac7ac60199a0aedfc7f29b1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45878
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index de93c99..e16bd1f 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -306,6 +306,8 @@
end # GSPI1 0xA0AB
device pci 1f.0 on
chip ec/google/chromeec
+ use conn0 as mux_conn[0]
+ use conn1 as mux_conn[1]
device pnp 0c09.0 on end
end
end # eSPI 0xA080 - A09F
@@ -320,14 +322,14 @@
register "usb3_port_number" = "3"
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
- device generic 0 on end
+ device generic 0 alias conn0 on end
end
chip drivers/intel/pmc_mux/conn
register "usb2_port_number" = "7"
register "usb3_port_number" = "4"
# SBU is fixed, HSL follows CC
register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
- device generic 1 on end
+ device generic 1 alias conn1 on end
end
end
end