tree f5a35f2323c9b7fc5c0da8179d1b0350814396c0
parent ca74d7e65b9562e4d84079af3583524d9e82460f
author Uwe Poeche <uwe.poeche@siemens.com> 1649077828 +0200
committer Felix Held <felix-coreboot@felixheld.de> 1649262027 +0000

soc/intel/ehl/fsp_params: Set Intel Speed Step (Eist) from devicetree

This patch provides the set value for intel speed step in devicetree
for FSPS. Before that in case of not set value in device tree the
default value of disabled was overwritten by default enabled of FSP.

Test: mainboard/siemens/mc_ehl/variants/mc_ehl1
Check status of Bit 16 in MSR 0x1a0 after boot.

Change-Id: I0a5ef4968a27978116c21ce35b3818c6b36e086f
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63352
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>