commit e8f2ef51e1809b8c20d87049586935a7f3dd90a7
author Patrick Georgi <pgeorgi@chromium.org> Fri Jul 29 18:53:34 2016 +0200
committer Martin Roth <martinroth@google.com> Sun Jul 31 19:01:56 2016 +0200
tree 9a421629de206570234d23c1e9e7b01530abe009
parent 90ed31beac54f6380a78a4b3c51c8fab434db95b

intel/broadwell: fix typo

(pci_read_config32(...) > 14) & 0x3 looks rather unusual (and prevents
"case 3" below from ever happening)

Change-Id: Id90655c39ff53da9569441278bbf73497d643480
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1293139
Reviewed-on: https://review.coreboot.org/15965
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

src/soc/intel/broadwell/pcie.c

diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index 41d66e2..1c9b50c 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -99,7 +99,7 @@
 static void pcie_iosf_port_grant_count(device_t dev)
 {
 	u8 update_val;
-	u32 rpcd = (pci_read_config32(dev, 0xfc) > 14) & 0x3;
+	u32 rpcd = (pci_read_config32(dev, 0xfc) >> 14) & 0x3;
 
 	switch (rpcd) {
 	case 1: