sb,soc/intel: Apply transitional flag TCO_SPACE_NOT_YET_SPLIT
Tree is inconsistent with the use of TCO register space offsets and
related preprocessor defines. The legacy space was offset from ACPI
PM base by 0x60, but this changed with later platforms. The convenient
way is to define the TCO registers relative to its base address and
subtract 0x60 here, but this change cannot be easily done tree-wide or
in one go.
For the transient period, apply TCO_SPACE_NOT_YET_SPLIT flag until
all platforms use a clean style of tco_{read,write} accessor functions
instead of {read,write}_pmbase16(), or worse, inw/outl().
Change-Id: I16213cdb13f98fccb261004b31e81a9a44cb6e3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index 13357c7..b189852 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -21,6 +21,7 @@
select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
+ select TCO_SPACE_NOT_YET_SPLIT
select USE_WATCHDOG_ON_BOOT
if SOUTHBRIDGE_INTEL_I82801JX