| commit | 2efc8808b8bfaee0a0e8f3ee387ecd9a3f049705 | [log] [tgz] |
|---|---|---|
| author | Patrick Georgi <patrick.georgi@secunet.com> | Tue Nov 06 11:03:53 2012 +0100 |
| committer | Patrick Georgi <patrick@georgi-clan.de> | Tue Nov 27 09:16:18 2012 +0100 |
| tree | c486b184f7609b42b3de3d5cd5d213226820a278 | |
| parent | acd7d952514485dbc41fa04b0d16be4002e31019 [diff] |
intel/gm45: new northbridge The code supports DDR3 boards only. RAM init for DDR2 is sufficiently different that it requires separate code, and we have no boards to test that. Change-Id: I9076546faf8a2033c89eb95f5eec524439ab9fe1 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1689 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>