Initial IGD OpRegion implementation
Change-Id: I9e57c5792409830895a1147799acab95d910a336
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1757
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index 03d146f..dd8681a 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -53,7 +53,7 @@
#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
#define DEFAULT_RCBABASE 0xfed1c000
-#include "../../../southbridge/intel/bd82x6x/pch.h"
+#include <southbridge/intel/bd82x6x/pch.h>
/* Everything below this line is ignored in the DSDT */
#ifndef __ACPI__
@@ -107,7 +107,8 @@
/* Device 0:2.0 PCI configuration space (Graphics Device) */
#define MSAC 0x62 /* Multi Size Aperture Control */
-
+#define SWSCI 0xe8 /* SWSCI enable */
+#define ASLS 0xfc /* OpRegion Base */
/*
* MCHBAR
@@ -233,6 +234,9 @@
struct mrc_data_container *find_current_mrc_cache(void);
#if !defined(__PRE_RAM__)
void update_mrc_cache(void);
+
+#include "gma.h"
+int init_igd_opregion(igd_opregion_t *igd_opregion);
#endif
#endif