commit e56189cfd1d90a2ca13650a9d21ff82cb79ccda8
author Patrick Rudolph <patrick.rudolph@9elements.com> Wed Apr 18 10:11:59 2018 +0200
committer Patrick Georgi <pgeorgi@google.com> Fri Apr 20 13:03:54 2018 +0000
tree 0da4c1fec6bdb725e4065d4d687364ae5c63104d
parent 6fcb9b00c8b7f820bb5ef81a83a24cd656654272

pci: Move inline PCI functions to pci_ops.h

Move inline function where they belong to. Fixes compilation
on non x86 platforms.

Change-Id: Ia05391c43b8d501bd68df5654bcfb587f8786f71
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25720
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/common/block/fast_spi/fast_spi.c

diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 288e0c4..b13408a 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -16,6 +16,7 @@
 #include <arch/io.h>
 #include <assert.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>

src/soc/intel/common/block/gspi/gspi.c

diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index 8bf27de..175fad8 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -21,6 +21,7 @@
 #include <delay.h>
 #include <device/device.h>
 #include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <intelblocks/gspi.h>
 #include <string.h>
 #include <timer.h>

src/soc/intel/common/block/pcie/pcie.c

diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c
index 7d383fd..4cd057d 100644
--- a/src/soc/intel/common/block/pcie/pcie.c
+++ b/src/soc/intel/common/block/pcie/pcie.c
@@ -18,6 +18,7 @@
 #include <device/pciexp.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
+#include <device/pci_ops.h>
 
 #define CACHE_LINE_SIZE	0x10
 /* Latency tolerance reporting, max non-snoop latency value 3.14ms */

src/soc/intel/common/block/pcr/pcr.c

diff --git a/src/soc/intel/common/block/pcr/pcr.c b/src/soc/intel/common/block/pcr/pcr.c
index cf487c5..39f9bb8 100644
--- a/src/soc/intel/common/block/pcr/pcr.c
+++ b/src/soc/intel/common/block/pcr/pcr.c
@@ -17,6 +17,7 @@
 #include <assert.h>
 #include <console/console.h>
 #include <intelblocks/pcr.h>
+#include <device/pci_ops.h>
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 #include <timer.h>