AMD: Isolate AGESA and PI build environments
To backport features introduced with recent Chromebooks and/or Intel
boards in general, heavy work on the AMD AGESA platform infrastructure
is required. With the AGESA PI available in binary form only, community
members have little means to verify, debug and develop for the said
platforms.
Thus it makes sense to fork the existing agesawrapper interfaces, to give
AMD PI platforms a clean and independent sandbox. New directory layout
reflects the separation already taken place under 3rdparty/ and vendorcode/.
Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7149
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Tested-by: build bot (Jenkins)
diff --git a/src/northbridge/amd/Kconfig b/src/northbridge/amd/Kconfig
index 33e19c2..c75e82c 100644
--- a/src/northbridge/amd/Kconfig
+++ b/src/northbridge/amd/Kconfig
@@ -5,6 +5,8 @@
source src/northbridge/amd/lx/Kconfig
source src/northbridge/amd/agesa/Kconfig
source src/northbridge/amd/cimx/Kconfig
+source src/northbridge/amd/pi/Kconfig
+
menu "HyperTransport setup"
#could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8)
depends on (NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
diff --git a/src/northbridge/amd/Makefile.inc b/src/northbridge/amd/Makefile.inc
index 7e85d08..edb4038 100644
--- a/src/northbridge/amd/Makefile.inc
+++ b/src/northbridge/amd/Makefile.inc
@@ -4,5 +4,6 @@
subdirs-$(CONFIG_NORTHBRIDGE_AMD_GX2) += gx2
subdirs-$(CONFIG_NORTHBRIDGE_AMD_LX) += lx
subdirs-$(CONFIG_NORTHBRIDGE_AMD_AGESA) += agesa
+subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI) += pi
subdirs-$(CONFIG_AMD_NB_CIMX) += cimx
diff --git a/src/northbridge/amd/agesa/BiosCallOuts.h b/src/northbridge/amd/agesa/BiosCallOuts.h
index 60299b7..feabf98 100644
--- a/src/northbridge/amd/agesa/BiosCallOuts.h
+++ b/src/northbridge/amd/agesa/BiosCallOuts.h
@@ -24,7 +24,7 @@
#include "Porting.h"
#include "AGESA.h"
-#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB || CONFIG_NORTHBRIDGE_AMD_AGESA_00730F01
+#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
#define BIOS_HEAP_START_ADDRESS 0x010000000
#define BIOS_HEAP_SIZE 0x30000
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig
index d557e62..677e947 100644
--- a/src/northbridge/amd/agesa/Kconfig
+++ b/src/northbridge/amd/agesa/Kconfig
@@ -37,7 +37,6 @@
source src/northbridge/amd/agesa/family15/Kconfig
source src/northbridge/amd/agesa/family15tn/Kconfig
source src/northbridge/amd/agesa/family16kb/Kconfig
-source src/northbridge/amd/agesa/00730F01/Kconfig
# TODO: Reservation for heap seems excessive
config HEAP_SIZE
diff --git a/src/northbridge/amd/agesa/Makefile.inc b/src/northbridge/amd/agesa/Makefile.inc
index f1be023..8f10664 100644
--- a/src/northbridge/amd/agesa/Makefile.inc
+++ b/src/northbridge/amd/agesa/Makefile.inc
@@ -22,7 +22,6 @@
subdirs-$(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15) += family15
subdirs-$(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN) += family15tn
subdirs-$(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB) += family16kb
-subdirs-$(CONFIG_NORTHBRIDGE_AMD_AGESA_00730F01) += 00730F01
romstage-y += def_callouts.c
ramstage-y += def_callouts.c
diff --git a/src/northbridge/amd/agesa/def_callouts.c b/src/northbridge/amd/agesa/def_callouts.c
index ee79be2..5d1b2be 100644
--- a/src/northbridge/amd/agesa/def_callouts.c
+++ b/src/northbridge/amd/agesa/def_callouts.c
@@ -104,7 +104,7 @@
return Status;
}
-#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB || CONFIG_NORTHBRIDGE_AMD_AGESA_00730F01
+#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
/* FIXME: we would like GFX disable for fam14 too for headless systems. */
AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt)
{
diff --git a/src/northbridge/amd/agesa/00730F01/Kconfig b/src/northbridge/amd/pi/00730F01/Kconfig
similarity index 94%
rename from src/northbridge/amd/agesa/00730F01/Kconfig
rename to src/northbridge/amd/pi/00730F01/Kconfig
index 36bc0fc..c053111 100644
--- a/src/northbridge/amd/agesa/00730F01/Kconfig
+++ b/src/northbridge/amd/pi/00730F01/Kconfig
@@ -17,11 +17,11 @@
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-config NORTHBRIDGE_AMD_AGESA_00730F01
+config NORTHBRIDGE_AMD_PI_00730F01
bool
select MMCONF_SUPPORT
-if NORTHBRIDGE_AMD_AGESA_00730F01
+if NORTHBRIDGE_AMD_PI_00730F01
config HW_MEM_HOLE_SIZEK
hex
diff --git a/src/northbridge/amd/agesa/00730F01/Makefile.inc b/src/northbridge/amd/pi/00730F01/Makefile.inc
similarity index 100%
rename from src/northbridge/amd/agesa/00730F01/Makefile.inc
rename to src/northbridge/amd/pi/00730F01/Makefile.inc
diff --git a/src/northbridge/amd/agesa/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
similarity index 100%
rename from src/northbridge/amd/agesa/00730F01/acpi/northbridge.asl
rename to src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
diff --git a/src/northbridge/amd/agesa/00730F01/chip.h b/src/northbridge/amd/pi/00730F01/chip.h
similarity index 84%
rename from src/northbridge/amd/agesa/00730F01/chip.h
rename to src/northbridge/amd/pi/00730F01/chip.h
index 4b6fc2c..aa08cff 100644
--- a/src/northbridge/amd/agesa/00730F01/chip.h
+++ b/src/northbridge/amd/pi/00730F01/chip.h
@@ -17,12 +17,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef _AGESA_00730F01_CHIP_H_
-#define _AGESA_00730F01_CHIP_H_
+#ifndef _PI_00730F01_CHIP_H_
+#define _PI_00730F01_CHIP_H_
-struct northbridge_amd_agesa_00730F01_config
+struct northbridge_amd_pi_00730F01_config
{
u8 spdAddrLookup[1][1][2];
};
-#endif /* _AGESA_00730F01_CHIP_H_ */
+#endif /* _PI_00730F01_CHIP_H_ */
diff --git a/src/northbridge/amd/agesa/00730F01/dimmSpd.c b/src/northbridge/amd/pi/00730F01/dimmSpd.c
similarity index 95%
rename from src/northbridge/amd/agesa/00730F01/dimmSpd.c
rename to src/northbridge/amd/pi/00730F01/dimmSpd.c
index 4cfbb7f..45a1b50 100644
--- a/src/northbridge/amd/agesa/00730F01/dimmSpd.c
+++ b/src/northbridge/amd/pi/00730F01/dimmSpd.c
@@ -34,7 +34,7 @@
{
int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
- ROMSTAGE_CONST struct northbridge_amd_agesa_00730F01_config *config = dev->chip_info;
+ ROMSTAGE_CONST struct northbridge_amd_pi_00730F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0))
return AGESA_ERROR;
diff --git a/src/northbridge/amd/agesa/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
similarity index 99%
rename from src/northbridge/amd/agesa/00730F01/northbridge.c
rename to src/northbridge/amd/pi/00730F01/northbridge.c
index 03433af..77425bb 100644
--- a/src/northbridge/amd/agesa/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -39,7 +39,7 @@
#include <cpu/amd/amdfam16.h>
#include <cpuRegisters.h>
#include "agesawrapper.h"
-#include <northbridge/amd/agesa/agesawrapper_call.h>
+#include <northbridge/amd/pi/agesawrapper_call.h>
#include "northbridge.h"
#include <cpu/x86/lapic.h>
@@ -494,7 +494,7 @@
.device = PCI_DEVICE_ID_AMD_10H_NB_HT,
};
-struct chip_operations northbridge_amd_agesa_00730F01_ops = {
+struct chip_operations northbridge_amd_pi_00730F01_ops = {
CHIP_NAME("AMD FAM16 Northbridge")
.enable_dev = 0,
};
@@ -1129,7 +1129,7 @@
}
}
-struct chip_operations northbridge_amd_agesa_00730F01_root_complex_ops = {
+struct chip_operations northbridge_amd_pi_00730F01_root_complex_ops = {
CHIP_NAME("AMD FAM16 Root Complex")
.enable_dev = root_complex_enable_dev,
};
diff --git a/src/northbridge/amd/agesa/00730F01/northbridge.h b/src/northbridge/amd/pi/00730F01/northbridge.h
similarity index 100%
rename from src/northbridge/amd/agesa/00730F01/northbridge.h
rename to src/northbridge/amd/pi/00730F01/northbridge.h
diff --git a/src/northbridge/amd/pi/BiosCallOuts.h b/src/northbridge/amd/pi/BiosCallOuts.h
new file mode 100644
index 0000000..feabf98
--- /dev/null
+++ b/src/northbridge/amd/pi/BiosCallOuts.h
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011,2012 Advanced Micro Devices, Inc.
+ * Copyright (C) 2013 Sage Electronic Engineering, LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef CALLOUTS_AMD_AGESA_H
+#define CALLOUTS_AMD_AGESA_H
+
+#include "Porting.h"
+#include "AGESA.h"
+
+#if CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15_TN || CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
+
+#define BIOS_HEAP_START_ADDRESS 0x010000000
+#define BIOS_HEAP_SIZE 0x30000
+#define BSP_STACK_BASE_ADDR 0x30000
+
+#else
+
+#define BIOS_HEAP_START_ADDRESS 0x10000 /* HEAP during cold boot */
+#define BIOS_HEAP_SIZE 0x20000
+#define BSP_STACK_BASE_ADDR 0x30000
+
+#endif
+
+typedef struct _BIOS_HEAP_MANAGER {
+ UINT32 StartOfAllocatedNodes;
+ UINT32 StartOfFreedNodes;
+} BIOS_HEAP_MANAGER;
+
+typedef struct _BIOS_BUFFER_NODE {
+ UINT32 BufferHandle;
+ UINT32 BufferSize;
+ UINT32 NextNodeOffset;
+} BIOS_BUFFER_NODE;
+
+UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
+void EmptyHeap(void);
+
+
+AGESA_STATUS agesa_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_DeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_LocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+
+AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_Reset (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt);
+
+AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+
+AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
+
+typedef struct {
+ UINT32 CalloutName;
+ AGESA_STATUS (*CalloutPtr) (UINT32 Func, UINT32 Data, VOID* ConfigPtr);
+} BIOS_CALLOUT_STRUCT;
+
+extern const BIOS_CALLOUT_STRUCT BiosCallouts[];
+extern const int BiosCalloutsLen;
+
+#endif /* CALLOUTS_AMD_AGESA_H */
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
new file mode 100644
index 0000000..8af4872
--- /dev/null
+++ b/src/northbridge/amd/pi/Kconfig
@@ -0,0 +1,36 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+
+config NORTHBRIDGE_AMD_PI
+ bool
+ default CPU_AMD_PI
+
+if NORTHBRIDGE_AMD_PI
+
+config CONSOLE_VGA_MULTI
+ bool
+ default n
+
+config S3_VGA_ROM_RUN
+ bool
+ default n
+
+source src/northbridge/amd/pi/00730F01/Kconfig
+
+endif # NORTHBRIDGE_AMD_PI
diff --git a/src/northbridge/amd/pi/Makefile.inc b/src/northbridge/amd/pi/Makefile.inc
new file mode 100644
index 0000000..294673c
--- /dev/null
+++ b/src/northbridge/amd/pi/Makefile.inc
@@ -0,0 +1,23 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+#
+
+subdirs-$(CONFIG_NORTHBRIDGE_AMD_PI_00730F01) += 00730F01
+
+romstage-y += def_callouts.c
+ramstage-y += def_callouts.c
diff --git a/src/northbridge/amd/pi/agesawrapper_call.h b/src/northbridge/amd/pi/agesawrapper_call.h
new file mode 100644
index 0000000..792c3b1
--- /dev/null
+++ b/src/northbridge/amd/pi/agesawrapper_call.h
@@ -0,0 +1,62 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _AGESAWRAPPER_CALL_H_
+#define _AGESAWRAPPER_CALL_H_
+
+#include <stdint.h>
+#include <console/console.h>
+#include "AGESA.h"
+
+/*
+ * Possible AGESA_STATUS values:
+ *
+ * 0x0 = AGESA_SUCCESS
+ * 0x1 = AGESA_UNSUPPORTED
+ * 0x2 = AGESA_BOUNDS_CHK
+ * 0x3 = AGESA_ALERT
+ * 0x4 = AGESA_WARNING
+ * 0x5 = AGESA_ERROR
+ * 0x6 = AGESA_CRITICAL
+ * 0x7 = AGESA_FATAL
+ */
+static const char * decodeAGESA_STATUS(AGESA_STATUS sret)
+{
+ const char* statusStrings[] = { "AGESA_SUCCESS", "AGESA_UNSUPPORTED",
+ "AGESA_BOUNDS_CHK", "AGESA_ALERT",
+ "AGESA_WARNING", "AGESA_ERROR",
+ "AGESA_CRITICAL", "AGESA_FATAL"
+ };
+ if (sret > 7) return "unknown"; /* Non-AGESA error code */
+ return statusStrings[sret];
+}
+
+static inline u32 do_agesawrapper(AGESA_STATUS (*func)(void), const char *name)
+{
+ AGESA_STATUS ret;
+ printk(BIOS_DEBUG, "agesawrapper_%s() entry\n", name);
+ ret = func();
+ printk(BIOS_DEBUG, "agesawrapper_%s() returned %s\n",
+ name, decodeAGESA_STATUS(ret));
+ return (u32)ret;
+}
+
+#define AGESAWRAPPER(func) do_agesawrapper(agesawrapper_ ## func, #func)
+
+#define AGESAWRAPPER_PRE_CONSOLE(func) agesawrapper_ ## func()
+
+#endif
diff --git a/src/northbridge/amd/pi/def_callouts.c b/src/northbridge/amd/pi/def_callouts.c
new file mode 100644
index 0000000..225bf53
--- /dev/null
+++ b/src/northbridge/amd/pi/def_callouts.c
@@ -0,0 +1,145 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2013 Sage Electronic Engineering, LLC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <cbfs.h>
+#include <spd_cache.h>
+
+#include "AGESA.h"
+#include "amdlib.h"
+#include "Ids.h"
+#include "agesawrapper.h"
+#include "BiosCallOuts.h"
+#include "dimmSpd.h"
+
+AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ UINTN i;
+
+ for (i = 0; i < BiosCalloutsLen; i++) {
+ if (BiosCallouts[i].CalloutName == Func)
+ break;
+ }
+ if(i >= BiosCalloutsLen)
+ return AGESA_UNSUPPORTED;
+
+ return BiosCallouts[i].CalloutPtr (Func, Data, ConfigPtr);
+}
+
+AGESA_STATUS agesa_NoopUnsupported (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ return AGESA_UNSUPPORTED;
+}
+
+AGESA_STATUS agesa_NoopSuccess (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ return AGESA_SUCCESS;
+}
+
+AGESA_STATUS agesa_EmptyIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ IDS_NV_ITEM *IdsPtr = ((IDS_CALLOUT_STRUCT *) ConfigPtr)->IdsNvPtr;
+ if (Data == IDS_CALLOUT_INIT)
+ IdsPtr[0].IdsNvValue = IdsPtr[0].IdsNvId = 0xffff;
+ return AGESA_SUCCESS;
+}
+
+AGESA_STATUS agesa_Reset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ AGESA_STATUS Status;
+ UINT8 Value;
+ UINTN ResetType;
+ AMD_CONFIG_PARAMS *StdHeader;
+
+ ResetType = Data;
+ StdHeader = ConfigPtr;
+
+ //
+ // Perform the RESET based upon the ResetType. In case of
+ // WARM_RESET_WHENVER and COLD_RESET_WHENEVER, the request will go to
+ // AmdResetManager. During the critical condition, where reset is required
+ // immediately, the reset will be invoked directly by writing 0x04 to port
+ // 0xCF9 (Reset Port).
+ //
+ switch (ResetType) {
+ case WARM_RESET_WHENEVER:
+ case COLD_RESET_WHENEVER:
+ break;
+
+ case WARM_RESET_IMMEDIATELY:
+ case COLD_RESET_IMMEDIATELY:
+ Value = 0x06;
+ LibAmdIoWrite (AccessWidth8, 0xCf9, &Value, StdHeader);
+ break;
+
+ default:
+ break;
+ }
+
+ Status = 0;
+ return Status;
+}
+
+AGESA_STATUS agesa_RunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ AGESA_STATUS Status;
+
+ Status = agesawrapper_amdlaterunaptask (Func, Data, ConfigPtr);
+ return Status;
+}
+
+AGESA_STATUS agesa_GfxGetVbiosImage(UINT32 Func, UINT32 FchData, VOID *ConfigPrt)
+{
+ GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
+ pVbiosImageInfo->ImagePtr = cbfs_get_file_content(
+ CBFS_DEFAULT_MEDIA, "pci"CONFIG_VGA_BIOS_ID".rom",
+ CBFS_TYPE_OPTIONROM, NULL);
+ /* printk(BIOS_DEBUG, "IMGptr=%x\n", pVbiosImageInfo->ImagePtr); */
+ return pVbiosImageInfo->ImagePtr == NULL ? AGESA_WARNING : AGESA_SUCCESS;
+}
+
+AGESA_STATUS agesa_ReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ AGESA_STATUS Status = AGESA_UNSUPPORTED;
+#ifdef __PRE_RAM__
+ Status = AmdMemoryReadSPD (Func, Data, ConfigPtr);
+#endif
+ return Status;
+}
+
+AGESA_STATUS agesa_ReadSpd_from_cbfs(UINT32 Func, UINT32 Data, VOID *ConfigPtr)
+{
+ AGESA_STATUS Status = AGESA_UNSUPPORTED;
+#ifdef __PRE_RAM__
+ AGESA_READ_SPD_PARAMS *info = ConfigPtr;
+ if (info->MemChannelId > 0)
+ return AGESA_UNSUPPORTED;
+ if (info->SocketId != 0)
+ return AGESA_UNSUPPORTED;
+ if (info->DimmId != 0)
+ return AGESA_UNSUPPORTED;
+
+ /* Read index 0, first SPD_SIZE bytes of spd.bin file. */
+ if (read_spd_from_cbfs((u8*)info->Buffer, 0) < 0)
+ die("No SPD data\n");
+
+ Status = AGESA_SUCCESS;
+#endif
+ return Status;
+}
diff --git a/src/northbridge/amd/agesa/00730F01/chip.h b/src/northbridge/amd/pi/dimmSpd.h
similarity index 68%
copy from src/northbridge/amd/agesa/00730F01/chip.h
copy to src/northbridge/amd/pi/dimmSpd.h
index 4b6fc2c..3af6720 100644
--- a/src/northbridge/amd/agesa/00730F01/chip.h
+++ b/src/northbridge/amd/pi/dimmSpd.h
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2013 Sage Electronic Engineering, LLC
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,12 +17,14 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef _AGESA_00730F01_CHIP_H_
-#define _AGESA_00730F01_CHIP_H_
+#ifndef _DIMMSPD_H_
+#define _DIMMSPD_H_
-struct northbridge_amd_agesa_00730F01_config
-{
- u8 spdAddrLookup[1][1][2];
-};
+AGESA_STATUS
+AmdMemoryReadSPD (IN UINT32 Func, IN UINT32 Data, IN OUT AGESA_READ_SPD_PARAMS *SpdData);
-#endif /* _AGESA_00730F01_CHIP_H_ */
+int hudson_readSpd(int spdAddress, char *buf, size_t len);
+
+int smbus_readSpd(int spdAddress, char *buf, size_t len);
+
+#endif