nb/intel/ironlake: Drop `pci_mmio_size`
There's no good reason to use values smaller than 2 GiB here. Well, it
increases available DRAM in 32-bit space. However, as this is a 64-bit
platform, it's highly unlikely that 32-bit limitations would cause any
issues anymore. It's more likely to have the allocator give up because
memory-mapped resources in 32-bit space don't fit within the specified
MMIO size, which can easily occur when using a discrete graphics card.
Change-Id: I6cdce5f56bc94cca7065ee3e38af60d1de66e45c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52070
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/ironlake/raminit.c b/src/northbridge/intel/ironlake/raminit.c
index f073dda..34e5657 100644
--- a/src/northbridge/intel/ironlake/raminit.c
+++ b/src/northbridge/intel/ironlake/raminit.c
@@ -1273,23 +1273,6 @@
}
#define DEFAULT_PCI_MMIO_SIZE 2048
-#define HOST_BRIDGE PCI_DEVFN(0, 0)
-
-static unsigned int get_mmio_size(void)
-{
- const struct device *dev;
- const struct northbridge_intel_ironlake_config *cfg = NULL;
-
- dev = pcidev_path_on_root(HOST_BRIDGE);
- if (dev)
- cfg = dev->chip_info;
-
- /* If this is zero, it just means devicetree.cb didn't set it */
- if (!cfg || cfg->pci_mmio_size == 0)
- return DEFAULT_PCI_MMIO_SIZE;
- else
- return cfg->pci_mmio_size;
-}
static void program_total_memory_map(struct raminfo *info)
{
@@ -1323,7 +1306,7 @@
uma_size_gtt = uma_sizes_gtt[(t >> 8) & 0xF];
}
- mmio_size = get_mmio_size();
+ mmio_size = DEFAULT_PCI_MMIO_SIZE;
tom = info->total_memory_mb;
if (tom == 4096)