commit | e79431288209f239600874b8f0c45a9490fa0ed6 | [log] [tgz] |
---|---|---|
author | Matt DeVillier <matt.devillier@puri.sm> | Thu Apr 01 14:03:03 2021 -0500 |
committer | Patrick Georgi <pgeorgi@google.com> | Sun Apr 18 20:39:23 2021 +0000 |
tree | 13d9c989198bb829977faefde5aab95c67b24c75 | |
parent | ab3fb6bba3b3b91b2c8e32df727af7aab4fa6884 [diff] |
mb/purism/librem_14: Update GPIO config Update GPIO config based on review of latest schematics: - LAN/WLAN reset lines are NC - SDIO lines configured via GPP_G0-G7 - DMIC lines are wired directly to codec, not PCH, so GPP_D17-20 are set to NC - Pads GPP_H0-H3 are configured for I2S2 - Pads GPP_H7-H9 are straps for board revision, so treated as GPI - CPU_C10_GATE# is NC - PWRBTN# does not need an internal pull-up - GPP_C20-23 are configured for M.2 UART - SATAXPCIE1/2 and EC SCI/SMI lines do not need internal pull ups - GPP_C6/C7 set to I2C1 for future use - GPP_E15 changed from SCI to SMI, edge triggered Change-Id: If113cfeadf093e10dd84ab827ead594088f02ba1 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52389 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.