| commit | e0d497a3b639c32cb6d8d8dba7d2e8f98739a02e | [log] [tgz] |
|---|---|---|
| author | Subrata Banik <subratabanik@google.com> | Tue Dec 06 23:56:29 2022 +0530 |
| committer | Subrata Banik <subratabanik@google.com> | Fri Dec 09 07:36:15 2022 +0000 |
| tree | 7bf8bad8d3f2065ef9df4ec16dc23c907fa1625b | |
| parent | 951fb00d4e5b467d9ec3ed1e73114fd42747b3b1 [diff] |
mb/google/rex: Enable S0ix This patch enables S0ix for Google/Rex platform. BUG=b:256807255 TEST=Able to program FADT table Bit 21 (Low Power Idle S0) Change-Id: I79546267d29622c65321f7dfa29d3aac2fa59438 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70430 Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb index 39fd8e8..cbfa49a 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb +++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -11,6 +11,9 @@ # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" + # S0ix enable + register "s0ix_enable" = "1" + # Enable CNVi BT register "cnvi_bt_core" = "true"