soc/intel/denverton_ns: Allow including microcode
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: Iaa295c74e9c470d5830e22d0b0c73013c7333293
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39266
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index a74250b..23b8452 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -53,6 +53,7 @@
select UDELAY_TSC
select UDK_2015_BINDING
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
+ select SUPPORT_CPU_UCODE_IN_CBFS
config MMCONF_BASE_ADDRESS
hex
diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc
index 7529892..635dab8 100644
--- a/src/soc/intel/denverton_ns/Makefile.inc
+++ b/src/soc/intel/denverton_ns/Makefile.inc
@@ -92,4 +92,6 @@
$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) --xip
$(call strip_quotes,$(CONFIG_FSP_S_CBFS))-options := -b $(CONFIG_FSP_S_ADDR) --xip
+cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5f-01
+
endif ## CONFIG_SOC_INTEL_DENVERTON_NS