AGESA: Move romstage main entry under cpu
As we now apply asmlinkage attributes to romstage_main()
entry, also x86_64 passes parameters on the stack.
Change-Id: If9938dbbe9a164c9c1029431499b51ffccb459c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18624
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc
index b7619ff..2a9beb8 100644
--- a/src/cpu/amd/agesa/cache_as_ram.inc
+++ b/src/cpu/amd/agesa/cache_as_ram.inc
@@ -29,7 +29,6 @@
/*
* XMM map:
* xmm0: BIST
- * xmm1: backup ebx -- cpu_init_detected
*/
.code32
@@ -46,19 +45,9 @@
orl $(3<<9), %eax
movl %eax, %cr4
- /* Get the cpu_init_detected */
- mov $1, %eax
- cpuid
- shr $24, %ebx
-
/* Save the BIST result */
cvtsi2sd %ebp, %xmm0
- /* for normal part %ebx already contain cpu_init_detected from fallback call */
-
- /* Save the cpu_init_detected */
- cvtsi2sd %ebx, %xmm1
-
post_code(0xa1)
AMD_ENABLE_STACK
@@ -109,36 +98,19 @@
ljmp $0x18, $1f
1:
- .code64
-
- call early_all_cores
-
- /* Pass the cpu_init_detected */
- cvtsd2si %xmm1, %esi
-
- /* Pass the BIST result */
- cvtsd2si %xmm0, %edi
-
- call cache_as_ram_main
- .code32
-
-#else
+#endif
call early_all_cores
/* Restore the BIST result */
cvtsd2si %xmm0, %edx
- /* Restore the cpu_init_detected */
- cvtsd2si %xmm1, %ebx
-
/* Must maintain 16-byte stack alignment here. */
pushl $0x0
pushl $0x0
- pushl %ebx /* init detected */
+ pushl $0x0
pushl %edx /* bist */
- call cache_as_ram_main
-#endif
+ call romstage_main
/* Should never see this postcode */
post_code(0xaf)
@@ -170,6 +142,3 @@
ret
cache_as_ram_setup_out:
-#ifdef __x86_64__
-.code64
-#endif