| commit | de8c7e39bce97f13e09e53a3a1bdf4edcfebec79 | [log] [tgz] |
|---|---|---|
| author | Lee Leahy <leroy.p.leahy@intel.com> | Sun Feb 14 14:55:29 2016 -0800 |
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | Fri Feb 19 20:24:02 2016 +0100 |
| tree | 53185fa99738fe924bcee9ffae2b21b0b0ccc3db | |
| parent | db7410e0a4250631e9757c2dbd6514dd2559da2a [diff] |
Documentation: x86 device tree processing and memory map Add documentation on: * FSP Silicon Init * How to start the x86 device tree processing for ramstage * Disabling the PCI devices * Generic PCI device drivers * Memory map support TEST=None Change-Id: If8f729a0ea1d48db4d5ec1d4ae3ad693e9fe44f0 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13718 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>