diff --git a/src/soc/amd/cezanne/gpio.c b/src/soc/amd/cezanne/gpio.c
index e1f5046..f2a59e0 100644
--- a/src/soc/amd/cezanne/gpio.c
+++ b/src/soc/amd/cezanne/gpio.c
@@ -1,10 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/gpio_banks.h>
-#include <amdblocks/acpimmio.h>
-#include <amdblocks/smi.h>
 #include <soc/gpio.h>
-#include <soc/smi.h>
 #include <types.h>
 
 /* see the IOMUX function table for the mapping from GPIO number to GEVENT number */
@@ -40,10 +37,3 @@
 	*table = gpio_event_table;
 	*items = ARRAY_SIZE(gpio_event_table);
 }
-
-void soc_gpio_hook(uint8_t gpio, uint8_t mux)
-{
-	/* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
-	if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
-		soc_route_sci(GPIO_2_EVENT);
-}
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index af948ce..186df50 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -179,8 +179,6 @@
 	return gpio;
 }
 
-__weak void soc_gpio_hook(uint8_t gpio, uint8_t mux) {}
-
 static void set_single_gpio(const struct soc_amd_gpio *g,
 			    struct sci_trigger_regs *sci_trigger_cfg)
 {
@@ -193,8 +191,6 @@
 	iomux_write8(g->gpio, g->function & AMD_GPIO_MUX_MASK);
 	iomux_read8(g->gpio); /* Flush posted write */
 
-	soc_gpio_hook(g->gpio, g->function);
-
 	gpio_setbits32(g->gpio, PAD_CFG_MASK, g->control);
 	/* Clear interrupt and wake status (write 1-to-clear bits) */
 	gpio_or32(g->gpio, GPIO_INT_STATUS | GPIO_WAKE_STATUS);
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
index 7e6914f..098208b 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
@@ -85,7 +85,5 @@
 int gpio_interrupt_status(gpio_t gpio);
 /* Implemented by soc, provides table of available GPIO mapping to Gevents */
 void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items);
-/* May be implemented by soc to handle special cases */
-void soc_gpio_hook(uint8_t gpio, uint8_t mux);
 
 #endif /* AMD_BLOCK_GPIO_BANKS_H */
diff --git a/src/soc/amd/picasso/gpio.c b/src/soc/amd/picasso/gpio.c
index b7e1a45..fe7d14b 100644
--- a/src/soc/amd/picasso/gpio.c
+++ b/src/soc/amd/picasso/gpio.c
@@ -1,10 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/gpio_banks.h>
-#include <amdblocks/acpimmio.h>
-#include <amdblocks/smi.h>
 #include <soc/gpio.h>
-#include <soc/smi.h>
 #include <types.h>
 
 static const struct soc_amd_event gpio_event_table[] = {
@@ -39,10 +36,3 @@
 	*table = gpio_event_table;
 	*items = ARRAY_SIZE(gpio_event_table);
 }
-
-void soc_gpio_hook(uint8_t gpio, uint8_t mux)
-{
-	/* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
-	if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
-		soc_route_sci(GPIO_2_EVENT);
-}
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index d30fa63..90c23a2 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -1,10 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <amdblocks/gpio_banks.h>
-#include <amdblocks/acpimmio.h>
-#include <amdblocks/smi.h>
 #include <soc/gpio.h>
-#include <soc/smi.h>
 #include <types.h>
 
 static const struct soc_amd_event gpio_event_table[] = {
@@ -39,10 +36,3 @@
 	*table = gpio_event_table;
 	*items = ARRAY_SIZE(gpio_event_table);
 }
-
-void soc_gpio_hook(uint8_t gpio, uint8_t mux)
-{
-	/* Always program Gevent when WAKE_L_AGPIO2 is configured as WAKE_L */
-	if ((gpio == 2) && !(mux & AMD_GPIO_MUX_MASK))
-		soc_route_sci(GPIO_2_EVENT);
-}