commit ddc88286979ebce24320f1fc44ba881ea8fdf114
author Arthur Heymans <arthur@aheymans.xyz> Mon Feb 27 16:27:21 2017 +0100
committer Nico Huber <nico.h@gmx.de> Mon May 08 14:40:04 2017 +0200
tree 9361ff4dd8217ae3523510cf1b77346725356a61
parent 0edf5dc331d427758fc6c72f176e019ede06fb92

nb/x4x/raminit.c: Remove ME locking code

This code ought not to run if ME is disabled. It also prohibits
writing to some GMCH regs like GGC bit1.

Intel ® 4 Series Chipset Family datasheet refers to this as
"ME stolen Memory lock" without actually describing this
functionality.

Change-Id: Iaa8646e535e13c44c010ccd434a5af954cf7dfbc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/northbridge/intel/x4x/raminit_ddr2.c

diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index eca7189..35caaa6 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -2106,15 +2106,19 @@
 	printk(BIOS_DEBUG, "Done power settings\n");
 
 	// ME related
-	if (RANK_IS_POPULATED(s->dimms, 0, 0)
-			|| RANK_IS_POPULATED(s->dimms, 1, 0)) {
-		MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 0);
+	/*
+	 * FIXME: This locks some registers like bit1 of GGC
+	 * and is only needed in case of ME being used.
+	 */
+	if (ME_UMA_SIZEMB != 0) {
+		if (RANK_IS_POPULATED(s->dimms, 0, 0)
+				|| RANK_IS_POPULATED(s->dimms, 1, 0))
+			MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 0);
+		if (RANK_IS_POPULATED(s->dimms, 0, 1)
+				|| RANK_IS_POPULATED(s->dimms, 1, 1))
+			MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 1);
+		MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
 	}
-	if (RANK_IS_POPULATED(s->dimms, 0, 1)
-			|| RANK_IS_POPULATED(s->dimms, 1, 1)) {
-		MCHBAR8(0xa2f) = MCHBAR8(0xa2f) | (1 << 1);
-	}
-	MCHBAR32(0xa30) = MCHBAR32(0xa30) | (1 << 26);
 
 	printk(BIOS_DEBUG, "Done ddr2\n");
 }