soc/amd/stoneyridge: Move BERT into a cbmem region
This removes the need to align BERT so that TSEG remains aligned.
Change-Id: I21b55a87838dcb4bd4099f051ba0a011a4d41eea
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 7bc5ad9..0127ac3 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -373,4 +373,12 @@
functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset.
+config ACPI_BERT_SIZE
+ hex
+ default 0x100000 if ACPI_BERT
+ default 0x0
+ help
+ Specify the amount of DRAM reserved for gathering the data used to
+ generate the ACPI table.
+
endif # SOC_AMD_STONEYRIDGE