mb/asrock/b85m_pro4: Factor out common MRC settings
These settings are the same on all boards. Since the other boards
currently overwrite the struct contents, it doesn't make a difference.
To ease review, the same settings will be dropped from other boards in
separate commits, one board at a time.
Change-Id: I500b7a1d7d97c6976e0c7c10ca491d3875cae22b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43109
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index b2f8e23..ee211be 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -29,6 +29,18 @@
int wake_from_s3;
struct pei_data pei_data = {
+ .pei_version = PEI_VERSION,
+ .mchbar = (uintptr_t)DEFAULT_MCHBAR,
+ .dmibar = (uintptr_t)DEFAULT_DMIBAR,
+ .epbar = DEFAULT_EPBAR,
+ .pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
+ .smbusbar = SMBUS_IO_BASE,
+ .hpet_address = HPET_ADDR,
+ .rcba = (uintptr_t)DEFAULT_RCBA,
+ .pmbase = DEFAULT_PMBASE,
+ .gpiobase = DEFAULT_GPIOBASE,
+ .temp_mmio_base = 0xfed08000,
+ .tseg_size = CONFIG_SMM_TSEG_SIZE,
};
mainboard_fill_pei_data(&pei_data);