soc/intel/common: Add Alder Lake device IDs
Add Alder Lake specific Host and Graphics device IDs.
As per latest document number: 619501, these IDs got an update.
Change-Id: I548a903714ccc7470f1425ac67c0c66522437365
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54674
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 78f02ec..15391ab 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -40,6 +40,7 @@
{ PCI_DEVICE_ID_INTEL_ADL_P_ID_7, "Alderlake-P" },
{ PCI_DEVICE_ID_INTEL_ADL_P_ID_8, "Alderlake-P" },
{ PCI_DEVICE_ID_INTEL_ADL_P_ID_9, "Alderlake-P" },
+ { PCI_DEVICE_ID_INTEL_ADL_M_ID_1, "Alderlake-M" },
};
static struct {
@@ -100,6 +101,8 @@
{ PCI_DEVICE_ID_INTEL_ADL_GT1_9, "Alderlake GT1" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
};