soc/intel/gma: Move DDI-A 4-lane config to common code
Change-Id: I0572dbbfb61e5e0129fe6a3a1b5894145d74fd0d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40728
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index 7a56d0d..f06d84b 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -25,6 +25,7 @@
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
select HAVE_INTEL_FSP_REPO
+ select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
help
Intel Coffeelake support
@@ -33,6 +34,7 @@
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
select HAVE_INTEL_FSP_REPO
+ select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
help
Intel Whiskeylake support
@@ -41,6 +43,7 @@
select SOC_INTEL_CANNONLAKE_BASE
select FSP_USES_CB_STACK
select HAVE_INTEL_FSP_REPO
+ select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
help
Intel Cometlake support
diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c
index cd5e773..5fbe0d5 100644
--- a/src/soc/intel/cannonlake/graphics.c
+++ b/src/soc/intel/cannonlake/graphics.c
@@ -11,20 +11,3 @@
{
return graphics_get_memory_base();
}
-
-void graphics_soc_init(struct device *dev)
-{
- uint32_t ddi_buf_ctl;
-
- /*
- * Enable DDI-A (eDP) 4-lane operation if the link is not up yet.
- * This will allow the kernel to use 4-lane eDP links properly
- * if the VBIOS or GOP driver do not execute.
- */
- ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
- if (!acpi_is_wakeup_s3() && !(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) {
- ddi_buf_ctl |= (DDI_A_4_LANES | DDI_INIT_DISPLAY_DETECTED |
- DDI_BUF_IS_IDLE);
- graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
- }
-}
diff --git a/src/soc/intel/common/block/graphics/Kconfig b/src/soc/intel/common/block/graphics/Kconfig
index 4ab9200..e632cb9 100644
--- a/src/soc/intel/common/block/graphics/Kconfig
+++ b/src/soc/intel/common/block/graphics/Kconfig
@@ -2,3 +2,8 @@
bool
help
Intel Processor common Graphics support
+
+config SOC_INTEL_CONFIGURE_DDI_A_4_LANES
+ bool
+ help
+ Selected by platforms that require DDI-A bifurcation setup.
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index ba4bc85..e2c9060 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <acpi/acpi.h>
#include <assert.h>
#include <bootmode.h>
#include <console/console.h>
@@ -34,6 +35,13 @@
/* SoC specific configuration. */
graphics_soc_init(dev);
+ if (CONFIG(SOC_INTEL_CONFIGURE_DDI_A_4_LANES) && !acpi_is_wakeup_s3()) {
+ const u32 ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
+ /* Only program if the buffer is not enabled yet. */
+ if (!(ddi_buf_ctl & DDI_BUF_CTL_ENABLE))
+ graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl | DDI_A_4_LANES);
+ }
+
/*
* GFX PEIM module inside FSP binary is taking care of graphics
* initialization based on RUN_FSP_GOP Kconfig option and input
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 55437f3..27c1084 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -74,6 +74,7 @@
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SOC_INTEL_COMMON_BLOCK_POWER_LIMIT
+ select SOC_INTEL_CONFIGURE_DDI_A_4_LANES
select SSE2
select SUPPORT_CPU_UCODE_IN_CBFS
select TSC_MONOTONIC_TIMER
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index d887097..27cb874 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <acpi/acpi.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/mmio.h>
@@ -16,7 +15,7 @@
return graphics_get_memory_base();
}
-static void graphics_setup_panel(struct device *dev)
+void graphics_soc_init(struct device *dev)
{
struct soc_intel_skylake_config *conf = config_of(dev);
struct resource *mmio_res;
@@ -76,24 +75,6 @@
}
}
-void graphics_soc_init(struct device *dev)
-{
- u32 ddi_buf_ctl;
-
- graphics_setup_panel(dev);
-
- /*
- * Enable DDI-A (eDP) 4-lane operation if the link is not up yet.
- * This will allow the kernel to use 4-lane eDP links properly
- * if the VBIOS or GOP driver does not execute.
- */
- ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
- if (!acpi_is_wakeup_s3() && !(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) {
- ddi_buf_ctl |= DDI_A_4_LANES;
- graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
- }
-}
-
const struct i915_gpu_controller_info *
intel_igd_get_controller_info(const struct device *device)
{