tree 72f77a0aca4044014cec9bd4e8f183a57fbc8e23
parent 2e4b95da88a5f72269956e34ecaa183cdca48f79
author Felix Held <felix-coreboot@felixheld.de> 1651679026 +0200
committer Felix Held <felix-coreboot@felixheld.de> 1651844155 +0000

soc/amd/common/include/espi: reduce visibility of IO/MMIO decode defines

The eSPI decode range defines aren't and shouldn't be used directly from
outside of the common AMD eSPI code which provides functions to abstract
the register access, so move the defines from amdblocks/espi.h to
espi_def.h inside the common AMD LPC/eSPI support directory to limit the
visibility. The special I/O range decode bits need to stay in
amdblocks/espi.h since those are used in the devicetree. Also update the
indentation in espi_def.h so that the defines line up properly.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic4ea30a1a6f10e94d88bf3b29f86dee2da6b39b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64053
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>