soc/amd/genoa: set up the non-FCH IOAPICs
Apart from the IOAPIC in the FCH which is handled by amd_lpc_ops,
there's one IOAPIC per PCI root which also needs to be initialized.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I38af5a194062e714827852e95f4e29b45311e517
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
diff --git a/src/soc/amd/genoa/domain.c b/src/soc/amd/genoa/domain.c
index 99d7edc..1a6115f 100644
--- a/src/soc/amd/genoa/domain.c
+++ b/src/soc/amd/genoa/domain.c
@@ -48,8 +48,18 @@
}
}
+static void genoa_domain_init(struct device *domain)
+{
+ struct resource *res = probe_resource(domain, IOMMU_IOAPIC_IDX);
+ if (!res)
+ return;
+
+ register_new_ioapic((void *)(uintptr_t)res->base);
+}
+
struct device_operations genoa_pci_domain_ops = {
.read_resources = genoa_domain_read_resources,
.set_resources = genoa_domain_set_resources,
.scan_bus = amd_pci_domain_scan_bus,
+ .init = genoa_domain_init,
};