soc/amd/cezanne: Enable CBFS_PRELOAD
The follow up CLs will use CBFS_PRELOAD. The default CBFS_CACHE_SIZE was
derived by examining the `cbfstool print` output and summing the files
we intend to preload.
BUG=b:179699789
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I208067e6ceec6ffb602a87bee3bf99a0a75c822d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index a09e9f9..dbafa8c 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -195,6 +195,7 @@
bool "Loads files from SPI asynchronously"
select COOP_MULTITASKING
select SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
+ select CBFS_PRELOAD
select PAYLOAD_PRELOAD
help
When enabled, the platform will use the LPC SPI DMA controller to
@@ -202,6 +203,10 @@
boot time because the CPUs can be performing useful work while the
SPI contents are being preloaded.
+config CBFS_CACHE_SIZE
+ hex
+ default 0x40000 if CBFS_PRELOAD
+
config RAMBASE
hex
default 0x10000000