mb/google/rex: Avoid boot hang due to missing SOC/IOE SRAM device
The SOC/IOE SRAM device is used to store crash logs. Previously, the
crashlog enablement was hardcoded in the baseboard.common module.
This commit moves the crashlog enablement logic to the baseboard
module, so that it can be enabled or disabled based on the specific
baseboard.
Additionally, the SOC/IOE SRAM is now enabled by default in the
baseboard devicetree.cb file. This prevents the system from hanging
if the SOC/IOE SRAM device is not present.
BUG=b:262501347
TEST=Able to build and boot google/screebo with this patch.
w/o this patch:
[ERROR] SOC SRAM device not found!
[ERROR] IOE SRAM base not valid
Change-Id: I02d581e5b62cfa114a3761a9704ad9f24dead8aa
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76134
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig
index 4bb9a67..f131b70 100644
--- a/src/mainboard/google/rex/Kconfig
+++ b/src/mainboard/google/rex/Kconfig
@@ -25,11 +25,9 @@
select MAINBOARD_HAS_TPM2
select PMC_IPC_ACPI_INTERFACE
select SOC_INTEL_COMMON_BLOCK_VARIANT_POWER_LIMIT
- select SOC_INTEL_CRASHLOG
select SOC_INTEL_CSE_LITE_SKU
select SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2
select SOC_INTEL_CSE_SEND_EOP_ASYNC
- select SOC_INTEL_IOE_DIE_SUPPORT
config BOARD_GOOGLE_BASEBOARD_REX
def_bool n
@@ -40,6 +38,8 @@
select HAVE_SLP_S0_GATE
select MAINBOARD_HAS_CHROMEOS
select MEMORY_SOLDERDOWN
+ select SOC_INTEL_CRASHLOG
+ select SOC_INTEL_IOE_DIE_SUPPORT
select SOC_INTEL_METEORLAKE_U_H
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
select SYSTEM_TYPE_LAPTOP
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 7acc0ae..76b9dcd 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -73,6 +73,7 @@
device domain 0 on
device ref igpu on end
device ref dtt on end
+ device ref ioe_shared_sram on end
device ref xhci on end
device ref pmc_shared_sram on end
device ref heci1 on end
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index bd38595..4f74ea4 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -349,7 +349,6 @@
device generic 0 on end
end
end
- device ref ioe_shared_sram on end
device ref xhci on
chip drivers/usb/acpi
device ref xhci_root_hub on
@@ -413,7 +412,6 @@
end
end
end
- device ref pmc_shared_sram on end
device ref cnvi_wifi on
chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0"