soc/amd/picasso: move data_fabric_read32 to common code
The exact same mechanism is used on Cezanne.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3179d8ec35efa29f9bc66854c3690b389d980bba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50619
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 16a1297..495d28f 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -29,6 +29,7 @@
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_AOAC
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
+ select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
select SOC_AMD_COMMON_BLOCK_GRAPHICS
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_HAS_ESPI_SUB_DECODE
diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c
index 899e005..758a35f 100644
--- a/src/soc/amd/picasso/agesa_acpi.c
+++ b/src/soc/amd/picasso/agesa_acpi.c
@@ -13,6 +13,7 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <amdblocks/cpu.h>
+#include <amdblocks/data_fabric.h>
#include <amdblocks/ioapic.h>
#include <soc/data_fabric.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c
index 82cece9..7b4283a 100644
--- a/src/soc/amd/picasso/data_fabric.c
+++ b/src/soc/amd/picasso/data_fabric.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi_device.h>
+#include <amdblocks/data_fabric.h>
#include <console/console.h>
#include <cpu/x86/lapic_def.h>
#include <device/device.h>
@@ -167,26 +168,3 @@
.vendor = PCI_VENDOR_ID_AMD,
.devices = pci_device_ids,
};
-
-static void data_fabric_set_indirect_address(uint8_t func, uint16_t reg, uint8_t instance_id)
-{
- uint32_t fabric_indirect_access_reg = DF_IND_CFG_INST_ACC_EN;
- /* Register offset field [10:2] in this register corresponds to [10:2] of the
- requested offset. */
- fabric_indirect_access_reg |= reg & DF_IND_CFG_ACC_REG_MASK;
- fabric_indirect_access_reg |=
- (func << DF_IND_CFG_ACC_FUN_SHIFT) & DF_IND_CFG_ACC_FUN_MASK;
- fabric_indirect_access_reg |= instance_id << DF_IND_CFG_INST_ID_SHIFT;
- pci_write_config32(SOC_DF_F4_DEV, DF_FICAA_BIOS, fabric_indirect_access_reg);
-}
-
-uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id)
-{
- if (instance_id == BROADCAST_FABRIC_ID)
- /* No bit masking required. Macros will apply mask to values. */
- return pci_read_config32(_SOC_DEV(DF_DEV, function), reg);
-
- /* non-broadcast data fabric accesses need to be done via indirect access */
- data_fabric_set_indirect_address(function, reg, instance_id);
- return pci_read_config32(SOC_DF_F4_DEV, DF_FICAD_LO);
-}
diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h
index 4dae6b4..3a19318 100644
--- a/src/soc/amd/picasso/include/soc/data_fabric.h
+++ b/src/soc/amd/picasso/include/soc/data_fabric.h
@@ -7,7 +7,6 @@
/* D18F0 - Fabric Configuration registers */
#define IOMS0_FABRIC_ID 9
-#define BROADCAST_FABRIC_ID 0xff
#define D18F0_VGAEN 0x80
#define VGA_ADDR_ENABLE BIT(0)
@@ -57,21 +56,6 @@
#define DF_DRAM_LIMIT(dram_map_pair) ((dram_map_pair) * 2 * sizeof(uint32_t) \
+ D18F0_DRAM_LIMIT0)
-#define DF_FICAA_BIOS 0x5C
-#define DF_FICAD_LO 0x98
-#define DF_FICAD_HI 0x9C
-
-#define DF_IND_CFG_INST_ACC_EN (1 << 0)
-#define DF_IND_CFG_ACC_REG_SHIFT 2
-#define DF_IND_CFG_ACC_REG_MASK (0x1ff << DF_IND_CFG_ACC_REG_SHIFT)
-#define DF_IND_CFG_ACC_FUN_SHIFT 11
-#define DF_IND_CFG_ACC_FUN_MASK (0x7 << DF_IND_CFG_ACC_FUN_SHIFT)
-#define DF_IND_CFG_64B_EN_SHIFT 14
-#define DF_IND_CFG_64B_EN (0x1 << DF_IND_CFG_64B_EN_SHIFT)
-#define DF_IND_CFG_INST_ID_SHIFT 16
-#define DF_IND_CFG_INST_ID_MASK (0xff << DF_IND_CFG_INST_ID_SHIFT)
-
void data_fabric_set_mmio_np(void);
-uint32_t data_fabric_read32(uint8_t function, uint16_t reg, uint8_t instance_id);
#endif /* AMD_PICASSO_DATA_FABRIC_H */