| commit | da7ffb48b2c84191b29dca41e6cdce5eb05524a1 | [log] [tgz] |
|---|---|---|
| author | Ronak Kanabar <ronak.kanabar@intel.com> | Tue Feb 05 01:51:13 2019 +0530 |
| committer | Subrata Banik <subrata.banik@intel.com> | Tue Feb 26 02:17:25 2019 +0000 |
| tree | 8217e09bad5ffd3068e06e6bfcae8f9e14bc46b3 | |
| parent | 66f9a09916368bfab09da42ef0beed84a4bb7206 [diff] [blame] |
soc/intel/common: Include cometlake PCH IDs Add cometlake specific PCH IDs Change-Id: I18dda48cee29213aa66c0ccddf3da31f0f489d2f Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/31234 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 9c35342..1d48b82 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c
@@ -520,6 +520,7 @@ PCI_DEVICE_ID_INTEL_SKL_CSE0, PCI_DEVICE_ID_INTEL_CNP_H_CSE0, PCI_DEVICE_ID_INTEL_ICL_CSE0, + PCI_DEVICE_ID_INTEL_CMP_CSE0, 0, };