diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c
index 098a63e..e2486cf 100644
--- a/src/southbridge/intel/lynxpoint/usb_ehci.c
+++ b/src/southbridge/intel/lynxpoint/usb_ehci.c
@@ -71,8 +71,8 @@
 	pci_cmd = pci_read_config32(dev, PCI_COMMAND);
 
 	switch (slp_typ) {
-	case SLP_TYP_S4:
-	case SLP_TYP_S5:
+	case ACPI_S4:
+	case ACPI_S5:
 		/* Check if controller is in D3 power state */
 		pwr_state = pci_read_config16(dev, EHCI_PWR_CTL_STS);
 		if ((pwr_state & PWR_CTL_SET_MASK) == PWR_CTL_SET_D3) {