Added support to ICH9 chipset family
Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c
index 5b58f0c..cf88142 100644
--- a/util/inteltool/pcie.c
+++ b/util/inteltool/pcie.c
@@ -43,6 +43,7 @@
case PCI_DEVICE_ID_INTEL_82Q35:
case PCI_DEVICE_ID_INTEL_82G33:
case PCI_DEVICE_ID_INTEL_82Q33:
+ case PCI_DEVICE_ID_INTEL_GS45:
epbar_phys = pci_read_long(nb, 0x40) & 0xfffffffe;
epbar_phys |= ((uint64_t)pci_read_long(nb, 0x44)) << 32;
break;
@@ -95,12 +96,12 @@
case PCI_DEVICE_ID_INTEL_82Q35:
case PCI_DEVICE_ID_INTEL_82G33:
case PCI_DEVICE_ID_INTEL_82Q33:
+ case PCI_DEVICE_ID_INTEL_GS45:
dmibar_phys = pci_read_long(nb, 0x68) & 0xfffffffe;
dmibar_phys |= ((uint64_t)pci_read_long(nb, 0x6c)) << 32;
break;
case PCI_DEVICE_ID_INTEL_82810:
case PCI_DEVICE_ID_INTEL_82810DC:
- case PCI_DEVICE_ID_INTEL_82830M:
printf("This northbrigde does not have DMIBAR.\n");
return 1;
default:
@@ -149,6 +150,7 @@
case PCI_DEVICE_ID_INTEL_82Q35:
case PCI_DEVICE_ID_INTEL_82G33:
case PCI_DEVICE_ID_INTEL_82Q33:
+ case PCI_DEVICE_ID_INTEL_GS45:
pciexbar_reg = pci_read_long(nb, 0x60);
pciexbar_reg |= ((uint64_t)pci_read_long(nb, 0x64)) << 32;
break;