tree 476682fdd8c630b4e01f8a4d64f3b38985a468ed
parent c46bb694955ba80f054bd5770afafbbb929472f6
author Matt Papageorge <matthewpapa07@gmail.com> 1621436667 -0500
committer Patrick Georgi <pgeorgi@google.com> 1621578926 +0000

mb/google/mancomb: Enable some PCIe power saving features

Enable ASPM, Common Clock and Clock Power Managment. Accomplish this
by adding the options in the platform Kconfig as well as dxio
descriptors.

BUG=b:187743927
TEST=Boot to ChromeOS and see ASPM, CC and Clock PM enabled with lspci

Change-Id: I9d6e606763798afc6b797d7d24ee7cae09f9e33f
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54681
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>