soc/amd/stoneyridge: correct GPIO emission error in ACPI

It can not emit byte data without BytePrefix.

design to:
Or (Local5, GPIO_PIN_OUT, Local5)

error due to GPIO_PIN_OUT is 0x40 but 0x40 encoding means
nothing in AML spec.
so it will include next emitted string in Or:
Or (Local5, Local5, \_SB.GPW2)

fix:
Store (0x40, Local0)
Or (Local5, Local0, Local5)

BUG=b:110962003

BRANCH=master
TEST=emerge-grunt coreboot
     extract SSDT then check ACPI syntax is correct
Change-Id: I7a0704112b77105826de87b14a38ed2f665224d5
Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/27306
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index 8130b79..5f9e792 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -357,14 +357,19 @@
 	}
 	uintptr_t addr = (uintptr_t) gpio_get_address(gpio_num);
 
+	/* Store (0x40, Local0) */
+	acpigen_write_store();
+	acpigen_write_integer(GPIO_PIN_OUT);
+	acpigen_emit_byte(LOCAL0_OP);
+
 	acpigen_soc_get_gpio_in_local5(addr);
 
 	if (val) {
 		/* Or (Local5, GPIO_PIN_OUT, Local5) */
-		acpigen_write_or(LOCAL5_OP, GPIO_PIN_OUT, LOCAL5_OP);
+		acpigen_write_or(LOCAL5_OP, LOCAL0_OP, LOCAL5_OP);
 	} else {
 		/* Not (GPIO_PIN_OUT, Local6) */
-		acpigen_write_not(GPIO_PIN_OUT, LOCAL6_OP);
+		acpigen_write_not(LOCAL0_OP, LOCAL6_OP);
 
 		/* And (Local5, Local6, Local5) */
 		acpigen_write_and(LOCAL5_OP, LOCAL6_OP, LOCAL5_OP);