tree 63ad3627c84692456e7c502a0f6026d60b1475a3
parent 93447c42a8349565530bffd47bf5c0214f22d690
author Matt DeVillier <matt.devillier@amd.corp-partner.google.com> 1661206078 -0500
committer Martin Roth <martin.roth@amd.corp-partner.google.com> 1661354055 +0000

vc/amd/fsp/mendocino: Update DMI_T17_MEMORY_TYPE

Synchronize with AGESA/AgesaModulePkg/Include/MemDmi.h.
Add/correct values for DDR5, LPDDR5, LPDDR5X.

BUG=b:239000826
TEST=Build and verify with other patches in train

Change-Id: I127f21bfe2dfcd7794eb543185ea3fb362ff3914
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66952
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>