commit d742b5e40c76a0855d9fcbe67beff0d0d5fd1648
author Raul E Rangel <rrangel@chromium.org> Thu Jun 10 14:39:01 2021 -0600
committer Raul Rangel <rrangel@chromium.org> Wed Jun 16 22:42:05 2021 +0000
tree 2a2cd4af2dae6a641d1125176adb8d84c429e69c
parent c545baaf476016c1c136c3c88214c3c4252d4059

timestamp,amd/common/apob_cache: Add timestamps for APOB

Updating the APOB takes a considerable amount of time. I decided to be
granular and split out the operations so we know when we read vs read +
erase + write.

BUG=b:179092979
TEST=Boot guybrush and dump timestamps
   3:after RAM initialization                          3,025,425 (44)
 920:starting APOB read                                3,025,430 (5)
 921:starting APOB erase                               3,025,478 (48)
 922:starting APOB write                               3,027,727 (2,249)
 923:finished APOB                                     3,210,965 (183,238)
   4:end of romstage                                   3,210,971 (6)

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I08e371873112e38f623f452af0eb946f5471c399
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/soc/amd/common/block/apob/apob_cache.c

diff --git a/src/soc/amd/common/block/apob/apob_cache.c b/src/soc/amd/common/block/apob/apob_cache.c
index 6b31143..238ae7a 100644
--- a/src/soc/amd/common/block/apob/apob_cache.c
+++ b/src/soc/amd/common/block/apob/apob_cache.c
@@ -10,6 +10,7 @@
 #include <spi_flash.h>
 #include <stdint.h>
 #include <string.h>
+#include <timestamp.h>
 
 #define DEFAULT_MRC_CACHE "RW_MRC_CACHE"
 /* PSP requires this value to be 64KiB */
@@ -114,6 +115,8 @@
 	if (get_nv_region(&region) != 0)
 		return;
 
+	timestamp_add_now(TS_AMD_APOB_READ_START);
+
 	apob_rom = get_apob_from_nv_region(&region);
 	if (apob_rom == NULL) {
 		update_needed = true;
@@ -123,8 +126,10 @@
 	} else
 		printk(BIOS_DEBUG, "APOB valid copy is already in flash\n");
 
-	if (!update_needed)
+	if (!update_needed) {
+		timestamp_add_now(TS_AMD_APOB_DONE);
 		return;
+	}
 
 	printk(BIOS_SPEW, "Copy APOB from RAM 0x%p/0x%x to flash 0x%zx/0x%zx\n",
 		apob_src_ram, apob_src_ram->size,
@@ -135,17 +140,23 @@
 		return;
 	}
 
+	timestamp_add_now(TS_AMD_APOB_ERASE_START);
+
 	/* write data to flash region */
 	if (rdev_eraseat(&write_rdev, 0, DEFAULT_MRC_CACHE_SIZE) < 0) {
 		printk(BIOS_ERR, "Error: APOB flash region erase failed\n");
 		return;
 	}
 
+	timestamp_add_now(TS_AMD_APOB_WRITE_START);
+
 	if (rdev_writeat(&write_rdev, apob_src_ram, 0, apob_src_ram->size) < 0) {
 		printk(BIOS_ERR, "Error: APOB flash region update failed\n");
 		return;
 	}
 
+	timestamp_add_now(TS_AMD_APOB_DONE);
+
 	printk(BIOS_INFO, "Updated APOB in flash\n");
 }