soc/intel/cmn/fast_spi: Add API to set SPI controller VCL
This patch creates a helper function to set SPI controller VCL bit as
recommended by Intel Flash Security Specification.
BUG=b:211954778
TEST=Able to build google/brya and verified that SPI flash controller
MMIO register 0xC4 bit 30 is set.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ie9a12db1bab81779fd8e7db90221d08da3c65011
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63626
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c
index 4ff1e9b..7e8a1a2 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi.c
@@ -171,6 +171,23 @@
}
/*
+ * Set FAST_SPIBAR + VSCC0 (0xC4) register VCL (bit 30).
+ */
+void fast_spi_vscc0_lock(void)
+{
+ void *spibar = fast_spi_get_bar();
+
+ /*
+ * SPI Flash Programming Guide Section 5.5.2 describes Vendor Component Lock (VCL).
+ * It is recommended to set the VCL bit. VCL applies to both VSCC0 and VSCC1.
+ * Without this bit being set, it is possible to modify Host/GbE VSCC register(s),
+ * which might results in undesired host and integrated GbE Serial Flash
+ * functionality.
+ */
+ setbits32(spibar + SPIBAR_SFDP0_VSCC0, SPIBAR_VSCC0_VCL);
+}
+
+/*
* Set FAST_SPIBAR Soft Reset Data Register value.
*/
void fast_spi_set_strap_msg_data(uint32_t soft_reset_data)